PIC12F519-I/SN Microchip Technology, PIC12F519-I/SN Datasheet - Page 24

• Manufacturer Part Number: PIC12F519-I/SN
• Description: IC PIC MCU FLASH 1KX12 8SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F519-I/SN

• Program Memory Type: FLASH
• Program Memory Size: 1.5KB (1K x 12)
• Package / Case: 8-SOIC (3.9mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Ram Size: 41 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 41 B
• Interface Type: USB
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• Height: 1.25 mm
• Length: 4.9 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 3.9 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12F519
5.2.2
Once a cell is erased, new data can be written. Pro-
gram execution is suspended during the write cycle.
The following sequence must be performed for a single
byte write.
1.
2.
3.
4.
If the WR bit is not set in the instruction cycle after the
WREN bit is set, the WREN bit will be cleared in
hardware.
Sample code that follows this procedure is included in
Example 3.
EXAMPLE 3:
5.3
Depending on the application, good programming
practice may dictate that data written to the Flash data
memory be verified. Example 4 is an example of a write
verify.
DS41319B-page 22
BANKSEL
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
Note 1: Only a series of BSF commands will work
Load EEADR with the address.
Load EEDATA with the data to write.
Set the WREN bit to enable write access to the
array.
Set the WR bit to initiate the erase cycle.
2: For reads, erases and writes to the Flash
Write Verify
WRITING TO FLASH DATA
MEMORY
EEADR
EE_ADR_WRITE
EEADR
EE_DATA_TO_WRITE ; LOAD DATA
EEDATA
EECON,WREN
EECON,WR
to enable the memory write sequence
documented in Example 2. No other
sequence of commands will work, no
exceptions.
data memory, there is no need to insert a
NOP into the user code as is done on
mid-range devices. The instruction imme-
diately
EECON,WR/RD” will be fetched and
executed properly.
MEMORY ROW
WRITING A FLASH DATA
following
; LOAD ADDRESS
;
; INTO EEDATA REGISTER
; ENABLE WRITES
; INITITATE ERASE
the
“BSF
EXAMPLE 4:
5.4
Code protection does not prevent the CPU from per-
forming read or write operations on the Flash data
memory. Refer to the code protection chapter for more
information.
MOVF
BSF
XORWF
BTFSS
GOTO
Code Protection
EEDATA, W
EECON, RD
EEDATA, W
STATUS, Z
WRITE_ERR
EEPROM
WRITE VERIFY OF DATA
© 2008 Microchip Technology Inc.
;EEDATA has not changed
;from previous write
;Read the value written
;
;Is data the same
;No, handle error
;Yes, continue