MT36HTJ51272Y-40EA2 Micron Technology Inc, MT36HTJ51272Y-40EA2 Datasheet - Page 7

• Manufacturer Part Number: MT36HTJ51272Y-40EA2
• Description: MODULE DDR2 4GB 240-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT36HTJ51272Y-40EA2

• Memory Type: DDR2 SDRAM
• Memory Size: 4GB
• Speed: 400MT/s
• Package / Case: 240-DIMM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 7:
PDF: 09005aef822553c2/Source: 09005aef822553af
HT36HTJ51272.fm - Rev. B 7/06 EN
Parameter/Condition
Precharge power-down current: All device banks idle;
CKE is LOW; Other control and address bus inputs are stable; Data bus
inputs are floating
Precharge quiet standby current: All device banks idle;
CKE is HIGH, S# is HIGH; Other control and address bus inputs are stable;
Data bus inputs are floating
Precharge standby current: All device banks idle;
HIGH, S# is HIGH; Other control and address bus inputs are switching;
Data bus inputs are switching
Active power-down current: All device banks open;
=
inputs are stable; Data bus inputs are floating
Active standby current: All device banks open;
t
commands; Other control and address bus inputs are switching; Data bus
inputs are switching
Operating burst write current: All device banks open; Continuous
burst writes; BL = 4, CL = CL (I
(I
Address bus inputs are switching; Data bus inputs are switching
Operating burst read current: All device banks open; Continuous burst
reads, I
MAX (I
commands; Address bus inputs are switching; Data bus inputs are
switching
Burst refresh current:
(I
control and address bus inputs are switching; Data bus inputs are
switching
Self refresh current: CK and CK# at 0V; CKE ≤ 0.2V; Other control and
address bus inputs are floating; Data bus inputs are floating
Operating bank interleave read current: All device banks interleaving
reads, I
=
HIGH, S# is HIGH between valid commands; Address bus inputs are stable
during deselects; Data bus inputs are switching
RAS MAX (I
DD
DD
t
t
CK (I
CK (I
),
) interval; CKE is HIGH, S# is HIGH between valid commands; Other
t
RP =
DD
OUT
DD
OUT
DD
),
); CKE is LOW; Other control and address bus
),
= 0mA; BL = 4, CL = CL (I
t
= 0mA; BL = 4, CL = CL (I
t
t
RP =
DD
RP (I
RC =
DDR2 I
Values shown for MT47H256M4 DDR2 SDRAM only and are computed from values specified in the 1Gb
(256 Meg x 4) component data sheet
),
DD
t
t
RP =
t
RP (I
RC (I
Notes:
); CKE is HIGH, S# is HIGH between valid commands;
DD
DD
t
DD
RP (I
t
); CKE is HIGH, S# is HIGH between valid
CK =
),
Specifications and Conditions – 4GB (continued)
t
DD
RRD =
1. a = Value calculated as one module rank in this operating condition, all other module ranks
DD
); CKE is HIGH, S# is HIGH between valid
t
CK (I
in I
b = Value calculated reflects all module ranks in this operating condition.
), AL = 0;
DD
t
DD
RRD (I
DD
DD
2
), AL = 0;
P
); REFRESH command at every
), AL =
(CKE LOW) mode.
t
DD
CK =
),
t
t
RCD (I
RCD =
t
t
CK =
CK (I
t
CK =
DD
DD
t
t
CK =
CK (I
t
RCD (I
t
),
) -1 ×
4GB (x72, ECC, DR) 240-Pin DDR2 SDRAM RDIMM
CK
t
CK (I
t
RAS =
t
DD
t
CK =
t
CK (I
CK =
Fast PDN exit
MR[12] = 0
Slow PDN exit
MR[12] = 1
DD
),
t
7
CK (I
DD
t
); CKE is
RAS =
DD
t
t
),
RAS MAX
CK (I
t
CK (I
DD
t
); CKE is
RAS =
);
t
DD
t
RFC
RAS
DD
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
CK
);
);
Symbol
I
I
I
I
I
I
I
DD
DD
DD
DD
DD
DD
DD
I
I
I
DD
DD
DD
4W
2Q
2N
3N
2P
3P
4R
5
6
7
b
b
a
b
b
a
b
b
b
a
1,980
2,160
1,440
2,520
3,006
3,006
9,360
5,526
-667
252
360
252
©2003 Micron Technology, Inc. All rights reserved.
1,476
1,620
1,080
1,980
2,466
2,736
9,000
5,346
-53E
252
360
252
I
DD
Specifications
1,260
1,440
1,620
2,106
2,106
7,920
4,806
-40E
252
900
360
252
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA