LM5115MTC/NOPB National Semiconductor, LM5115MTC/NOPB Datasheet - Page 11

• Manufacturer Part Number: LM5115MTC/NOPB
• Description: IC CTRLR SSPR MULT OUTPT 16TSSOP
• Manufacturer: National Semiconductor
• Type: Step-Down (Buck)r

Specifications of LM5115MTC/NOPB

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.7 ~ 13.5 V
• Current - Output: 20A
• Frequency - Switching: 1MHz
• Voltage - Input: 4.5 ~ 75 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Power - Output: 300W
• For Use With: LM5115EVAL - BOARD EVALUATION LM5115LM5115DC EVAL - BOARD EVALUATION LM5115DCLM5115AEVAL - BOARD EVALUATION LM5115A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM5115MTC; *LM5115MTC/NOPB; LM5115MTC

Error Amplifier and Soft-Start (FB,
CO, & COMP, SS)
fier is configured as an open drain output it can be disabled
by connecting FB to ground. The current sense amplifier and
current limiting function will be described in a later section.
Leading Edge Pulse Width
Modulation
Unlike conventional voltage mode controllers, the LM5115
implements leading edge pulse width modulation. A current
source equal to 3 times the I
Leading edge modulation of the auxiliary PWM controller is
required if the main converter is implemented with peak
current mode control. If trailing edge modulation were used,
the additional load on the transformer secondary from the
auxiliary channel would be drawn only during the first portion
of the phase signal pulse. Referring to Figure 5, the turn off
the high side MOSFET of the auxiliary regulator would cre-
ate a non-monotonic negative step in the transformer cur-
SYNC
(Continued)
FIGURE 4. Synchronization and Leading Edge Modulation
current is used to charge
FIGURE 5. Leading versus Trailing Edge Modulation
11
the capacitor connected to the RAMP pin as shown in Figure
4. The ramp signal and the output of the error amplifier
(COMP) are combined through a resistor network to produce
a voltage ramp with variable dc offset (CRMIX in Figure 4).
The high side MOSFET which drives the HS pin is held in the
off state at the beginning of the phase signal. When the
voltage of CRMIX exceeds the internal threshold voltage CV,
the PWM comparator turns on the high side MOSFET. The
HS pin rises and the MOSFET delivers current from the main
converter phase signal to the output of the auxiliary regula-
tor. The PWM cycle ends when the phase signal falls and
power is no longer supplied to the drain of the high side
MOSFET.
rent. This negative current step would produce instability in a
peak current mode controller. With leading edge modulation,
the additional load presented by the auxiliary regulator on
the transformer secondary will be present during the latter
portion of the phase signal. This positive step in the phase
signal current can be accommodated by a peak current
mode controller without instability.
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