NCP5378MNR2G ON Semiconductor, NCP5378MNR2G Datasheet - Page 10

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NCP5378MNR2G

Manufacturer Part Number
NCP5378MNR2G
Description
IC CTLR 1PH SYNC BUCK 32QFN
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP5378MNR2G

Applications
Controller, Power Supplies for Next-Generation Intel Processors
Voltage - Input
4.3 ~ 7 V
Number Of Outputs
1
Voltage - Output
0.5 ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-TFQFN Exposed Pad
Output Voltage
0.075 V to 3 V
Output Current
2 mA
Input Voltage
- 0.3 V to + 3 V
Operating Temperature Range
0 C to + 70 C
Mounting Style
SMD/SMT
Isolated/non-isolated
Non Isolated
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
General
controller designed with necessary features for CPU
applications. The IC consists of the following blocks:
Precision Flexible DAC, Differential Remote Voltage Sense
Amplifier, High Performance Voltage Error Amplifier,
Differential Current Feedback Amplifier, precision
programmable DAC and PWM Comparator with
Hysteresis. The controller also supports power saving
operation at light load. Protection features include:
Undervoltage Lockout, Soft Start, Over Current Protection,
Over Voltage Protection, and Power Good Monitor.
VID Inputs
normal operation. In VR11 mode the VID capture is enabled
at the end of the V
DAC counter will track to it. If an invalid VID occurs it will
be ignored for 10 ms before the controller shuts down.
Remote Sense Amplifier
accurately sense the output voltage of the regulator. The
noninverting input should be connected to the regulator’s
output voltage. The inverting input should be connected to
the return line of the regulator. Both connection points are
intended to be at a remote point so that the most accurate
reading of the output voltage can be obtained. The amplifier
is configured in a very unique way. First, the gain of the
amplifier is internally set to unity. Second, both the inverting
and noninverting inputs of the amplifier are summing nodes.
The inverting input sums the output voltage return voltage
with the DAC voltage. The noninverting input sums the
The NCP5378 is a ramp−pulse−modulated (RPM)
VID0−VID7 control the target regulation voltage during
A high performance differential amplifier is provided to
DRVH−SW
DRVL
SW
IN
BST
waiting period. If the VID is valid the
tpdl
DRVL
90%
2V
tf
DRVL
tpdh
FUNCTIONAL DESCRIPTIONS
10%
DRVH
Figure 2. Timing Diagram
10%
http://onsemi.com
th
DRVH
10
90%
remote output voltage with a 1.3 V reference. The resulting
voltage at the output of the remote sense amplifier is:
circuit and into the inverting input of the error amplifier. The
noninverting input of the error amplifier is also connected to
the 1.3 V reference. The 1.3 V reference then is subtracted
out and the error signal at the comp pin of the error amplifier
is as normally expected:
The noninverting input of the remote sense amplifier is pulled
low through a small current sink during a fault condition to
prevent accidental charging of the regulator output.
High Performance Voltage Error Amplifier
The error amplifier’s inverting input and its output (the
compensation pin) are both pinned out. A standard type 3
compensation circuit is used to compensate the system. This
involves a 3 pole, 2 zero compensation network. The system
output current during a transient can slew as fast as 500 A/ms.
The high frequency output impedance of the system may be
as low as 0.5 milli−ohm. The PWM will need to go from a low
duty cycle to full duty cycle within 100 ns. In order to respond
to this magnitude of change, the output of the error amplifier
must slew at a rate of at least 5 V/ms. The error amplifier
output voltage needs to be able to slew from steady state to
below 1.0 V or above 2.5 V. The error amplifier also needs to
be very fast. The output of the error amplifier needs to
respond within 50 ns to any perturbation on the input.
This signal then goes through a standard compensation
A high performance voltage error amplifier is provided.
V
Diffout
tpdl
DRVH
+ V
90%
V
out
comp
2V
) 1.3 V * V
tf
DRVH
+ V
dac
tpdh
10%
* V
DRVL
10%
dac
out
* V
tr
DRVL
outreturn
90%

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