X9530V14I Intersil, X9530V14I Datasheet - Page 9

• Manufacturer Part Number: X9530V14I
• Description: IC LASR CTRLR 1CHAN 5.5V 14TSSOP
• Manufacturer: Intersil
• Type: Laser Diode Controller (Fiber Optic)r

Specifications of X9530V14I

• Number Of Channels: 1
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 9mA
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 14-TSSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 4. A/D Converter Input Select Structure
A/D Converter Range
From Figure 3 we can see that the operating range of
the A/D converter input depends on the voltage
reference. And from Figure 4 we see that the internal
temperature Sensor output also varies with the voltage
reference (VRef).
The table below summarizes the voltage range
restrictions on the VSense and VRef pins in different
configurations :
VSense and VRef ranges
External
External Internal Temp. Sensor
All voltages referred to Vss.
Internal
Internal
VRef
Temperature
VSense
Pin
On-chip
Sensor
A/D Converter Input
Internal Temp. Sensor
VRef
ADCIN: bit 3 in Control register 0.
VSense Pin
VSense Pin
9
0 ≤ V(VRef) ≤ 1.3 V
Not a Valid Case
0 ≤ V(VSense) ≤
0 ≤ V(VSense) ≤
Not Applicable
To A/D
Converter
Input
Ranges
V(VRef)
V(VRef)
X9530
LOOK-UP TABLES
The X9530 memory array contains two 64-byte look-up
tables. One is associated to pin I1’s output current
generator and the other to pin I2’s output current
generator, through their corresponding D/A converters.
The output of each look-up table is the byte contained in
the selected row. By default these bytes are the inputs
to the D/A converters driving pins I1 and I2.
The byte address of the selected row is obtained by
adding the look-up table base address (90h for LUT1,
and D0h for LUT2) and the appropriate row selection
bits. See Figure 6.
By default the look-up table selection bits are the 6-bit
output of the A/D converter. Alternatively, the A/D
converter can be bypassed and the six row selection
bits are the six LSBs of Control Registers 1 and 2, for
the LUT1 and LUT2 respectively. The selection
between these options is illustrated in Figure 7, and
described in “I2DS: Current Generator 2 Direction Select
Bit (Non-volatile)” on page 6, and “Control Register 2”
on page 6.
CURRENT GENERATOR BLOCK
The Current Generator pins I1 and I2 are outputs of
two independent current mode D/A converters.
D/A Converter Operation
The Block Diagram for each of the D/A converters is
shown in Figure 5.
The input byte of the D/A converter selects a voltage
on the non-inverting input of an operational amplifier.
The output of the amplifier drives the gate of a FET,
whose source is connected to ground via resistor R1.
This node is also fed back to the inverting input of the
amplifier. The drain of the FET is connected to the
output current pin (I1) via a “polarity select” circuit
block.
November 11, 2005
FN8211.1