X9530V14I Intersil, X9530V14I Datasheet - Page 13

IC LASR CTRLR 1CHAN 5.5V 14TSSOP

X9530V14I

Manufacturer Part Number
X9530V14I
Description
IC LASR CTRLR 1CHAN 5.5V 14TSSOP
Manufacturer
Intersil
Type
Laser Diode Controller (Fiber Optic)r
Datasheet

Specifications of X9530V14I

Number Of Channels
1
Voltage - Supply
3 V ~ 5.5 V
Current - Supply
9mA
Operating Temperature
-40°C ~ 100°C
Package / Case
14-TSSOP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
X9530V14I
Manufacturer:
Intersil
Quantity:
270
Serial Clock and Data
Data states on the SDA line can change only while
SCL is LOW. SDA state changes while SCL is HIGH
are reserved for indicating START and STOP
conditions. See Figure 10. On power-up of the X9530,
the SDA pin is in the input mode.
Serial Start Condition
All commands are preceded by the START condition,
which is a HIGH to LOW transition of SDA while SCL
is HIGH. The device continuously monitors the SDA
and SCL lines for the START condition and does not
respond to any command until this condition has been
met. See Figure 9.
Serial Stop Condition
All communications must be terminated by a STOP
condition, which is a LOW to HIGH transition of SDA
while SCL is HIGH. The STOP condition is also used
to place the device into the Standby power mode after
a read sequence. A STOP condition can only be
issued after the transmitting device has released the
bus. See Figure 9.
Serial Acknowledge
An ACK (Acknowledge), is a software convention used
to indicate a successful data transfer. The transmitting
device, either master or slave, releases the bus after
transmitting eight bits. During the ninth clock cycle, the
receiver pulls the SDA line LOW to acknowledge the
reception of the eight bits of data. See Figure 11.
Figure 8. D/A Converter Power-on Reset Response
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X9530
The device responds with an ACK after recognition of
a START condition followed by a valid Slave Address
byte. A valid Slave Address byte must contain the
Device Type Identifier 1010, and the Device Address
bits matching the logic state of pins A2, A1, and A0.
See Figure 13.
If a write operation is selected, the device responds
with an ACK after the receipt of each subsequent
eight-bit word.
In the read mode, the device transmits eight bits of
data, releases the SDA line, and then monitors the line
for an ACK. The device continues transmitting data if
an ACK is detected. The device terminates further
data transmissions if an ACK is not detected. The
master must then issue a STOP condition to place the
device into a known state.
The X9530 acknowledges all incoming data and
address bytes except: 1) The “Slave Address Byte”
when the “Device Identifier” or “Device Address” are
wrong; 2) All “Data Bytes” when the “WEL” bit is “0”,
with the exception of a “Data Byte” addresses to
location 86h; 3) “Data Bytes” following a “Data Byte”
addressed to locations 80h, 85h, or 86h.
Vcc
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Time
Time
November 11, 2005
FN8211.1

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