X9530V14I Intersil, X9530V14I Datasheet - Page 24

• Manufacturer Part Number: X9530V14I
• Description: IC LASR CTRLR 1CHAN 5.5V 14TSSOP
• Manufacturer: Intersil
• Type: Laser Diode Controller (Fiber Optic)r

Specifications of X9530V14I

• Number Of Channels: 1
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 9mA
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 14-TSSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

D/A CONVERTER CHARACTERISTICS
All typical values are for 25°C ambient temperature and 5 V at pin Vcc. Maximum and minimum specifications are over the
recommended operating conditions. All voltages are referred to the voltage at pin Vss unless otherwise specified. All bits in
control registers are “0” unless otherwise specified. 510Ω, 0.1%, resistor connected between R1 and Vss, and another
between R2 and Vss unless otherwise specified. 400kHz TTL input at SCL unless otherwise specified. SDA pulled to Vcc
through an external 2kΩ resistor unless otherwise specified. 2-wire interface in “standby” (see notes 1 and 2 on page 22),
unless otherwise specified. WP, A0, A1, and A2 floating unless otherwise specified.
Notes: 1. LSB is defined as
IFS
IFS
IFS
IFS
Offset
FSError
DNL
INL
VISink
VISource
I
I
t
TCO
OVER
UNDER
rDAC
Symbol
00
01
10
11
DAC
DAC
I1I2
2. Offset
3. These parameters are periodically sampled and not 100% tested.
DAC
DAC
expressed in LSB.
FSError
is expressed in LSB. The Offset
DNL
the output of the DAC, when the input changes by one code step. It is expressed in LSB. The measured values are adjusted for Offset
and Full Scale Error before calculating DNL
INL
ing the measured transfer curve for Offset and Full Scale Error. It is expressed in LSB.
DAC
DAC
DAC
: The Integral Non-Linearity of a DAC is defined as the deviation between the measured and ideal transfer curves, after adjust-
I1 or I2 full scale current, with external
resistor setting
I1 or I2 full scale current, with internal
low current setting option
I1 or I2 full scale current, with internal
middle current setting option
I1 or I2 full scale current, with internal
high current setting option
I1 or I2 D/A converter offset error
I1 or I2 D/A converter full scale error
I1 or I2 D/A converter
Differential Nonlinearity
I1 or I2 D/A converter Integral Nonlin-
earity with respect to a straight line
through 0 and the full scale value
I1 or I2 Sink Voltage Compliance
I1 or I2 Source Voltage Compliance
I1 or I2 overshoot on D/A Converter
data byte transition
I1 or I2 undershoot on D/A Converter
data byte transition
I1 or I2 rise time on D/A Converter data
byte transition; 10% to 90%
Temperataure coefficient of output
current I1 or I2 when using internal
resistor setting
DAC
: The Differential Non-Linearity of a DAC is defined as the deviation between the measured and ideal incremental change in
: The Offset of a DAC is defined as the deviation between the measured and ideal output, when the DAC input is 01h. It is
: The Full Scale Error of a DAC is defined as the deviation between the measured and ideal output, when the input is FFh. It
24
[
2
3
Parameter
x
V(VRef)
255
DAC
]
is subtracted from the measured value before calculating FSError
divided by the resistance between R1 or R2 to Vss.
DAC
.
X9530
1.56
0.64
Min
-0.5
0.3
1.2
-2
-1
1
1
0
5
±200
1.58
0.85
Typ
0.4
1.3
Vcc-1.2
Max
1.06
Vcc
1.6
0.5
1.6
0.5
30
1
2
1
0
0
ppm/
Unit
LSB
LSB
LSB
LSB
mA
mA
mA
mA
μA
μA
°C
μs
V
V
DAC input Byte = FFh,
Source or sink mode, V(I1)
and V(I2) are Vcc - 1.2V in
source mode and 1.2V in sink
mode.
See notes 1 and 2.
In this range the current at I1
or I2 vary < 1%
In this range the current at I1
or I2 vary < 1%
DAC input byte changing from
00h to FFh and vice
versa, V(I1) and V(I2) are
Vcc - 1.2V in source mode
and 1.2V in sink mode.
See note 3.
See Figure 5.
Bits I1FSO[1:0] ¦ 00
Bits I2FSO[1:0] ¦ 002,
VRMbit = “1”
Test Conditions / Notes
DAC
.
November 11, 2005
2
or
FN8211.1