ADE7758ARW Analog Devices Inc, ADE7758ARW Datasheet - Page 57

no-image

ADE7758ARW

Manufacturer Part Number
ADE7758ARW
Description
IC ENERGY METERING 24-SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADE7758ARW

Rohs Status
RoHS non-compliant
Input Impedance
380 KOhm
Measurement Error
0.1%
Voltage - I/o High
2.4V
Voltage - I/o Low
0.8V
Current - Supply
8mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (0.300", 7.50mm Width)
Meter Type
3 Phase
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADE7758ARW
Quantity:
1 000
Part Number:
ADE7758ARWZ
Manufacturer:
AD
Quantity:
517
Part Number:
ADE7758ARWZ
Manufacturer:
AD
Quantity:
53
Part Number:
ADE7758ARWZ
Manufacturer:
AD
Quantity:
1 000
Part Number:
ADE7758ARWZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
ADE7758ARWZRL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
DOUT
The communications register is an 8-bit, write-only register.
The MSB determines whether the next data transfer operation
is a read or a write. The seven LSBs contain the address of the
register to be accessed (see Table 16).
Figure 89 and Figure 90 show the data transfer sequences for a
read and write operation, respectively.
SCLK
Figure 88. Addressing ADE7758 Registers via the Communications Register
DIN
CS
DOUT
Figure 89. Reading Data from the ADE7758 via the Serial Interface
COMMUNICATIONS REGISTER WRITE
DIN
0
SEQUENCE
ADDRESS
PROGRAM
DOUT
SCLK
IRQ
DIN
CS
IRQ
REGISTER NO. 1
REGISTER NO. 2
REGISTER NO. 3
REGISTER NO. n–1
REGISTER NO. n
COMMUNICATIONS
t
1
t
1
REGISTER
JUMP
ISR
TO
0
READ STATUS REGISTER COMMAND
MULTIBYTE
0
INTERRUPT
GLOBAL
MASK
OUT
OUT
OUT
OUT
OUT
0
IN
IN
IN
IN
IN
READ DATA
1
CLEAR MCU
INTERRUPT
REGISTER
ADDRESS
DECODE
0
FLAG
Figure 86. ADE7758 Interrupt Management
Figure 87. ADE7758 Interrupt Timing
0
0
STATUS WITH
RESET (0x1A)
Rev. D | Page 57 of 72
READ
t
1
2
t
9
t
11
(BASED ON STATUS CONTENTS)
SCLK
On completion of a data transfer (read or write), the ADE7758
once again enters into communications mode, that is, the next
instruction followed must be a write to the communications
register.
A data transfer is completed when the LSB of the ADE7758
register being addressed (for a write or a read) is transferred to
or from the ADE7758.
SERIAL WRITE OPERATION
The serial write sequence takes place as follows. With the
ADE7758 in communications mode and the CS input logic low,
a write to the communications register takes place first. The
MSB of this byte transfer must be set to 1, indicating that the
next data transfer operation is a write to the register. The seven
LSBs of this byte contain the address of the register to be written
to. The ADE7758 starts shifting in the register data on the next
falling edge of SCLK. All remaining bits of register data are
shifted in on the falling edge of the subsequent SCLK pulses
(see
DIN
CS
DB15
Figure 91
COMMUNICATIONS REGISTER WRITE
Figure 90. Writing Data to the ADE7758 via the Serial Interface
ISR ACTION
STATUS REGISTER CONTENTS
1
ADDRESS
).
t
3
t
12
DB8 DB7
GLOBAL INTERRUPT
MASK RESET
ISR RETURN
MCU
INTERRUPT
FLAG SET
MULTIBYTE READ DATA
DB0
JUMP
ISR
TO
ADE7758

Related parts for ADE7758ARW