ADE7758ARW Analog Devices Inc, ADE7758ARW Datasheet - Page 38

• Manufacturer Part Number: ADE7758ARW
• Description: IC ENERGY METERING 24-SOIC
• Manufacturer: Analog Devices Inc

Specifications of ADE7758ARW

• Rohs Status: RoHS non-compliant
• Input Impedance: 380 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 8mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Meter Type: 3 Phase
• Lead Free Status / RoHS Status: Not Compliant

ADE7758
Integration Time Under Steady Load
The discrete time sample period (T) for the accumulation
register is 0.4 μs (4/CLKIN). With full-scale sinusoidal signals
on the analog inputs, a 90° phase difference between the voltage
and the current signal (the largest possible reactive power), and
the VAR gain registers set to 0x000, the average word value from
each LPF2 is 0xCCCCD.
The maximum value that can be stored in the reactive energy
register before it overflows is 2
average word value is added to the internal register, which can
store 2
integration time under these conditions with VARDIV = 0 is
calculated as
When VARDIV is set to a value different from 0, the time
before overflow are scaled accordingly as shown in Equation 37.
Energy Accumulation Mode
The reactive power accumulated in each VAR-hr accumulation
register (AVARHR, BVARHR, or CVARHR) depends on the
configuration of the CONSEL bits in the COMPMODE register
(Bit 0 and Bit 1). The different configurations are described in
Table 13. Note that IA ’ /IB ’ /IC ’ are the current phase-shifted
current waveform.
Table 13. Inputs to VAR-Hr Accumulation Registers
CONSEL[1, 0]
00
01
10
11
The contents of the VAR-hr accumulation registers are affected
by both the current gain register (IGAIN) and the VAR gain
register of the corresponding phase. IGAIN should not be used
when using Mode 0 of CONSEL COMPMODE[1:0].
Reactive Power Frequency Output
Pin 17 (VARCF) of the ADE7758 provides frequency output for
the total reactive power. Similar to APCF, this pin provides an
output frequency that is directly proportional to the total
reactive power. The pulse width of VARPCF is 64/ CLKIN if
VARCFNUM and VARCFDEN are both equal. If VARCFDEN
is greater than VARCFNUM, the pulse width depends on
VARCFDEN. The pulse width in this case is T × ( VARCFDEN /2),
where T is the period of the VARCF pulse and VARCFDEN /2
is rounded to the nearest whole number. An exception to this
is when the period is greater than 180 ms. In this case, the pulse
width is fixed at 90 ms.
Time = Time ( VARDIV = 0) × VARDIV
Time
40
− 1 or 0xFF, FFFF, FFFF before it overflows, the
=
0xFF,
0xCCCCD
FFFF,
AVARHR
VA × IA’
VA (IA’ – IB’)
VA (IA’ – IB’)
Reserved
FFFF
15
×
− 1 or 0x7FFF. Because the
0.4
BVARHR
VB × IB
0
0
Reserved
μs
=
0.5243
sec
CVARHR
VC × IC’
VC (IC’ – IB’)
VC × IC’
Reserved
(36)
(37)
Rev. D | Page 38 of 72
A digital-to-frequency converter (DFC) is used to generate the
VARCF pulse output from the total reactive power. The TERMSEL
bits (Bit 2 to Bit 4) of the COMPMODE register can be used to
select which phases to include in the total reactive power calcu-
lation. Setting Bit 2, Bit 3, and Bit 4 includes the input to the
AVARHR, BVARHR, and CVARHR registers in the total
reactive power calculation. The total reactive power is signed
addition. However, setting the SAVAR bit (Bit 6) in the
COMPMODE register enables absolute value calculation. If the
active power of that phase is positive, no change is made to the
sign of the reactive power. However, if the sign of the active power
is negative in that phase, the sign of its reactive power is inverted
before summing and creating VARCF pulses. This mode should
be used in conjunction with the absolute value mode for active
power (Bit 5 in the COMPMODE register) for APCF pulses.
The effects of setting the ABS and SAVAR bits of the
COMPMODE register are as follows when ABS = 1 and
SAVAR = 1:
If watt > 0, APCF = Watts, VARCF = +VAR.
If watt < 0, APCF = |Watts|, VARCF = −VAR.
The output from the DFC is divided down by a pair of frequency
division registers before sending to the VARCF pulse output.
Namely, VARCFDEN/VARCFNUM pulses are needed at the
DFC output before the VARCF pin outputs a pulse. Under
steady load conditions, the output frequency is directly
proportional to the total reactive power.
Figure 73 illustrates the energy-to-frequency conversion in the
ADE7758. Note that the input to the DFC can be selected between
the total reactive power and total apparent power. Therefore,
the VARCF pin can output frequency that is proportional to the
total reactive power or total apparent power. The selection is
made by setting the VACF bit (Bit 7) in the WAVMODE register.
Setting this bit switches the input to the total apparent power.
The default value of this bit is logic low. Therefore, the default
output from the VARCF pin is the total reactive power.
All other operations of this frequency output are similar to that
of the active power frequency output (see the Active Power
Frequency Output section).
INPUT TO BVARHR
INPUT TO CVARHR
INPUT TO AVARHR
INPUT TO BVAHR
INPUT TO CVAHR
INPUT TO AVAHR
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
REGISTER
Figure 73. Reactive Power Frequency Output
+
+
+
+
+
+
WAVMODE REGISTER
VACF BIT (BIT 7) OF
0
1
DFC
VARCFNUM[11:0]
VARCFDEN[11:0]
÷
÷4
VARCF