ADE7758ARW Analog Devices Inc, ADE7758ARW Datasheet - Page 34

• Manufacturer Part Number: ADE7758ARW
• Description: IC ENERGY METERING 24-SOIC
• Manufacturer: Analog Devices Inc

Specifications of ADE7758ARW

• Rohs Status: RoHS non-compliant
• Input Impedance: 380 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 8mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Meter Type: 3 Phase
• Lead Free Status / RoHS Status: Not Compliant

ADE7758
The maximum output frequency (APCFNUM = 0x00 and
APCFDEN = 0x00) with full-scale ac signals on one phase is
approximately 16 kHz.
The ADE7758 incorporates two registers to set the frequency of
APCF (APCFNUM[11:0] and APCFDEN[11:0]). These are
unsigned 12-bit registers that can be used to adjust the frequency of
APCF by 1/2
output frequency is 1.562 kHz while the contents of APCFDEN
are 0 (0x000), then the output frequency can be set to 6.103 Hz
by writing 0xFF to the APCFDEN register.
If 0 were written to any of the frequency division registers, the
divider would use 1 in the frequency division. In addition, the
ratio APCFNUM/APCFDEN should be set not greater than 1 to
ensure proper operation. In other words, the APCF output
frequency cannot be higher than the frequency on the DFC output.
The output frequency has a slight ripple at a frequency equal to
2× the line frequency. This is due to imperfect filtering of the
instantaneous power signal to generate the active power signal
(see the Active Power Calculation section). Equation 14 gives an
expression for the instantaneous power signal. This is filtered by
LPF2, which has a magnitude response given by Equation 23.
The active power signal (output of the LPF2) can be rewritten as
where f
p
( )
H
t
( )
1
=
f
is the line frequency, for example, 60 Hz.
VRMS
=
12
1
to 1 with a step of 1/2
+
×
1
IRMS
f
2
1
ZXSEL[0:2] ARE BITS 3 TO 5 IN THE LCYCMODE REGISTER
8
ZERO-CROSSING
ZERO-CROSSING
ZERO-CROSSING
2
DETECTION
DETECTION
DETECTION
(PHASE A)
(PHASE B)
(PHASE C)
−
ACTIVE POWER
⎡
⎢
⎢
⎢
⎢
⎣
VRMS
1
+
ZXSEL0
ZXSEL1
ZXSEL2
( )
2
×
12
f
. For example, if the
1
IRMS
1
1
1
WATTOS[11:0]
2
+
8
+
Figure 70. ADE7758 Line Cycle Active Energy Accumulation Mode
2
⎤
⎥
⎥
⎥
⎥
⎦
×
cos
WG[11:0]
(
4
π
t f
1
)
WDIV[7:0]
LINECYC[15:0]
CALIBRATION
(23)
(24)
CONTROL
Rev. D | Page 34 of 72
%
+
+
40
15
From Equation 24, E(t) equals
From Equation 25, it can be seen that there is a small ripple in
the energy calculation due to the sin(2ωt) component (see
Figure 69). The ripple gets larger with larger loads. Choosing a
lower output frequency for APCF during calibration by using a
large APCFDEN value and keeping APCFNUM relatively small
can significantly reduce the ripple. Averaging the output
frequency over a longer period achieves the same results.
Line Cycle Active Energy Accumulation Mode
The ADE7758 is designed with a special energy accumulation
mode that simplifies the calibration process. By using the on-
chip, zero-crossing detection, the ADE7758 updates the watt-hr
accumulation registers after an integer number of zero crossings
(see Figure 70). The line-active energy accumulation mode for
watt-hr accumulation is activated by setting the LWATT bit
(Bit 0) of the LCYCMODE register. The total energy accumu-
lated over an integer number of half-line cycles is written to the
watt-hr accumulation registers after the LINECYC number of zero
crossings is detected. When using the line cycle accumulation
mode, the RSTREAD bit (Bit 6) of the LCYCMODE register
should be set to Logic 0.
WATTHR[15:0]
VRMS
×
IRMS
0
E(t)
ACCUMULATE ACTIVE POWER FOR
LINECYC NUMBER OF ZERO-CROSSINGS;
WATT-HR ACCUMULATION REGISTERS
ARE UPDATED ONCE EVERY LINECYC
NUMBER OF ZERO-CROSSINGS
Figure 69. Output Frequency Ripple
×
t
–
⎡
⎢
⎢
⎢
⎢
⎣
–
4
π
4π × f
VRMS
0
t f
1
t
Vlt
1
1
VI
1 +
+
×
( )
2f
2
IRMS
8
1
f
2
1
2
× sin(4π × f
8
2
⎤
⎥
⎥
⎥
⎥
⎦
×
1
cos(
× t)
4
π
t f
1
)
(25)