C8051F986-GUR Silicon Labs, C8051F986-GUR Datasheet - Page 145

• Manufacturer Part Number: C8051F986-GUR
• Description: 8-bit Microcontrollers - MCU 8kB 512B RAM 12b ADC
• Manufacturer: Silicon Labs

Specifications of C8051F986-GUR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

SFR Definition 13.5. EIE2: Extended Interrupt Enable 2
SFR Page = All;SFR Address = 0xE7
Name
Reset
Type
Bit
Bit
7
6
5
4
3
2
1
0
ECSEOS Enable Capacitive Sense End of Scan Interrupt.
ECSCPT Enable Capacitive Sense Conversion Complete Interrupt.
ERTC0F Enable SmaRTClock Oscillator Fail Interrupt.
EWARN Enable Supply Monitor Early Warning Interrupt.
ECSDC
Unused
Unused
Name
EMAT
R/W
7
0
Read = 0b. Write = Don’t care.
0: Disable Capacitive Sense End of Scan interrupt.
1: Enable interrupt requests generated by CS0EOS.
Enable Capacitive Sense Digital Comparator Interrupt.
0: Disable Capacitive Sense Digital Comparator interrupt.
1: Enable interrupt requests generated by CS0CMPF.
0: Disable Capacitive Sense Conversion Complete interrupt.
1: Enable interrupt requests generated by CS0INT.
Read = 0b. Write = Don’t care.
This bit sets the masking of the SmaRTClock Alarm interrupt.
0: Disable SmaRTClock Alarm interrupts.
1: Enable interrupt requests generated by SmaRTClock Alarm.
Enable Port Match Interrupts.
This bit sets the masking of the Port Match Event interrupt.
0: Disable all Port Match interrupts.
1: Enable interrupt requests generated by a Port Match.
This bit sets the masking of the Supply Monitor Early Warning interrupt.
0: Disable the Supply Monitor Early Warning interrupt.
1: Enable interrupt requests generated by the Supply Monitor.
ECSEOS
R/W
6
0
ECSDC
R/W
5
0
ECSCPT
R/W
Rev. 1.1
4
0
C8051F99x-C8051F98x
Function
R
3
0
ERTC0F
R/W
2
0
EMAT
R/W
1
0
EWARN
R/W
0
0
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