LRI64-A1S STMICROELECTRONICS [STMicroelectronics], LRI64-A1S Datasheet - Page 9
LRI64-A1S
Manufacturer Part Number
LRI64-A1S
Description
Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO15693 and ISO18000-3 Mode 1 Compliant
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.LRI64-A1S.pdf
(38 pages)
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VCD TO LRI64 FRAMES
Request Frames are delimited by a Start of Frame
(SOF) and an End of Frame (EOF) and are imple-
mented using a code violation mechanism. Un-
used options are reserved for future use.
The LRI64 is ready to receive a new command
frame from the VCD after a delay of t
14.) after having sent a response frame to the
VCD.
The LRI64 generates a Power On delay of t
(see
ing field. After this delay, the LRI64 is ready to re-
ceive a command frame from the VCD.
Figure 8. Request SOF, using the “1-out-of-4” Data Coding Mode
Figure 9. Request EOF
Table
9.44 µs
14.) after being activated by the power-
37.76 µs
2
(see
Table
37.76 µs
POR
9.44 µs
9.44 µs
In ISO 15693 and ISO 18000-3 Mode 1 standards,
the SOF is used to define the data coding mode
that the VCD is going to use in the following com-
mand frame.
The SOF that is shown in
out-of-4” data coding mode. (The LRI64 does not
support the SOF for the “1-out-of-256” data coding
mode.)
The corresponding EOF sequence is shown in
Figure 9.
9.44 µs
9.44 µs
37.76 µs
Figure 8.
selects the “1-
AI06660
AI06662
LRI64
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