LRI64-A1S STMICROELECTRONICS [STMicroelectronics], LRI64-A1S Datasheet - Page 16

• Manufacturer Part Number: LRI64-A1S
• Description: Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO15693 and ISO18000-3 Mode 1 Compliant
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

LRI64
ANTI-COLLISION
The purpose of the anti-collision sequence is to al-
low the VCD to compile a list of the LRI64 devices
that are present in the VCD field, each one identi-
fied by its unique ID (UID).
The VCD is the master of the communication with
one or multiple LRI64 devices. It initiates the com-
munication by issuing the Inventory Request
(Figure
Request Flags
The Nb_slots_flag needs to be set appropriately.
The AFI Flag needs to be set, if the Optional AFI
Field is to be present.
Mask Length and Mask Value
The Mask Length defines the number of significant
bits in the Mask Value.
The Mask Value is contained in an integer number
of bytes.
The least significant bit of each is transmitted first.
If the Mask Length is not a multiple of 8 (bits), the
most significant end of the Mask Value is padded
with the required number of null bits (set to 0) so
that the Mask Value is contained in an integer
number of bytes, so that the next field (the 2-Byte
CRC) starts at the next byte boundary.
Figure 21. Comparison between the Mask, Slot Number and UID
16/38
Mask value received in the Inventory command
The Mask value less the padding 0s is loaded
into the Tag comparator
The Slot counter is calculated
The Slot counter is concatened to the Mask value
The concatenated result is compared with
the least significant bits of the Tag UID.
Nb_slots_flags = 0 (16 slots), Slot Counter is 4 bits
Nb_slots_flags = 0
23.).
b63
xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx
Bits ignored
In the example of
11 bits. The Mask Value, 10011001111, is padded
out at the most significant end with five bits set to
0. The 11 bits Mask plus the current slot number is
compared to the UID.
Inventory Responses
Each LRI64 sends its Response in a given time
slot, or else remains silent.
The first slot starts immediately after the reception
of the Request EOF.
To switch to the next slot, the VCD sends another
EOF.
The following rules and restrictions apply:
–
–
The pulse shall be generated according to the def-
inition of the EOF in ISO 15693 and ISO 18000-3
Mode 1 standards.
if no LRI64 answer is detected, the VCD may
switch to the next slot by sending an EOF
if one or more LRI64 answers are detected,
the VCD waits until the complete frame has
been received before sending an EOF, to
switch to the next slot.
UID
MSB
MSB
0000 0100 1100 1111 b 16 bits
MSB
xxxx
xxxx 100 1100 1111 b
LSB
MSB
100 1100 1111 b 11 bits
Compare
Figure
LSB
LSB
LSB
b0
b
21., the Mask Length is
4 bits
15 bits
64 bits
AI06682