LRI64-A1S STMICROELECTRONICS [STMicroelectronics], LRI64-A1S Datasheet - Page 11

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LRI64-A1S

Manufacturer Part Number
LRI64-A1S
Description
Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO15693 and ISO18000-3 Mode 1 Compliant
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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LRI64 TO VCD FRAMES
Response Frames are delimited by a Start of
Frame (SOF) and an End of Frame (EOF) and are
implemented using a code violation mechanism.
The LRI64 supports these in the one subcarrier
mode, at the fast data rate, only.
The VCD is ready to receive a response frame
from the LRI64 before 320.9µs (t
sent a command frame.
Figure 12. Response SOF, using High Data Rate and One Subcarrier
Figure 13. Response EOF, using High Data Rate and One Subcarrier
37.76 µs
1
) after having
113.28 µs
LRI64 SOF
SOF comprises three parts: (see
LRI64 EOF
EOF comprises three parts: (see
an unmodulated period of 56.64µs,
24 pulses of 423.75kHz (f
a logic 1 which starts with an unmodulated
period of 18.88µs followed by 8 pulses of
423.75kHz.
a logic 0 which starts with 8 pulses of
423.75kHz followed by an unmodulated
period of 18.88µs.
24 pulses of 423.75kHz (f
an unmodulated time of 56.64µs.
113.28 µs
37.76 µs
c
C
/32),
/32),
Figure
Figure
AI06671B
AI06675B
12.)
13.)
LRI64
11/38

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