LRI64-A1S STMICROELECTRONICS [STMicroelectronics], LRI64-A1S Datasheet - Page 8

• Manufacturer Part Number: LRI64-A1S
• Description: Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO15693 and ISO18000-3 Mode 1 Compliant
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

LRI64
DATA RATE AND DATA CODING
The data coding method involves pulse position
modulation. The LRI64 supports the “1-out-of-4”
pulse coding mode. Any request that the VCD
might send in the “1-out-of-256” pulse coded
mode, is ignored, and the LRI64 remains in its cur-
rent state.
Two bit values are encoded at a time, by the posi-
tioning of a pause of the carrier frequency in one
of four possible 18.88µs (256/fc) time slots, as
shown in
Figure 7. “1-out-of-4” Coding Mode
8/38
Pulse position for "00"
Pulse position for "01" (1=LSB)
Pulse position for "10" (0=LSB)
Pulse position for "11"
9.44 µs
Figure 7.
9.44 µs
28.32 µs
9.44 µs
75.52 µs
75.52 µs
75.52 µs
75.52 µs
47.20µs
Four successive pairs of bits form a byte. The
transmission of one byte takes 302.08 µs and,
consequently, the data rate is 26.48 kbits/s (fc/
512).
The encoding for the least significant pair of bits is
transmitted first. For example
transmission of E1h (225d, 1110 0001b) by the
VCD.
9.44 µs
66.08 µs
Figure 6.
9.44 µs
AI06658
shows the