LRI64-A1S STMICROELECTRONICS [STMicroelectronics], LRI64-A1S Datasheet - Page 10

• Manufacturer Part Number: LRI64-A1S
• Description: Memory TAG IC, 64-bit Unique ID with WORM User Area 13.56MHz, ISO15693 and ISO18000-3 Mode 1 Compliant
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

LRI64
COMMUNICATIONS SIGNAL FROM LRI64 TO VCD
ISO 15693 and ISO 18000-3 Mode 1 standards
define several modes, for some parameters, to ca-
ter for use in different application requirements
and noise environments. The LRI64 does not sup-
port all of these modes, but supports the single
subcarrier mode at the fast data rate.
Load Modulation
The LRI64 is capable of communication to the
VCD via the inductive coupling between the two
antennas. The carrier is loaded, with a subcarrier
with frequency f
the LRI64.
The amplitude of the variation to the signal, as re-
ceived on the VCD antenna, is at least 10mV,
when measured as described in the test methods
defined in International Standard ISO10373-7.
Subcarrier
The LRI64 supports the one subcarrier modulation
response format. This format is selected by the
VCD using the first bit in the protocol header.
The frequency, f
tion is 423.75kHz (=f
Data Rate
The LRI64 response uses the high data rate for-
mat (26.48 kbits/s). The selection of the data rate
is made by the VCD using the second bit in the
protocol header.
Bit Representation and Coding using One
Subcarrier, at the High Data Rate
Data bits are encoded using Manchester coding,
as described in
10/38
S
Figure 10.
S
, generated by switching a load in
, of the subcarrier load modula-
C
/32).
and
Figure 11.
Logic 0. A logic 0 starts with 8 pulses of
423.75kHz (f
period of 18.88µs as shown in
Figure 10. Logic 0, High Data Rate
Logic 1. A logic 1 starts with an unmodulated
period of 18.88µs followed by 8 pulses of
423.75kHz (f
Figure 11. Logic 1, High Data Rate
C
C
/32) as shown in
/32) followed by an unmodulated
37.76 µs
37.76 µs
Figure 10.
Figure 11.
AI06664
AI06663