K4H510638E-TC/LA2 SAMSUNG [Samsung semiconductor], K4H510638E-TC/LA2 Datasheet
K4H510638E-TC/LA2
Related parts for K4H510638E-TC/LA2
K4H510638E-TC/LA2 Summary of contents
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... DDR SDRAM stacked 512Mb E-die (x4/x8) Stacked 512Mb E-die DDR SDRAM Specification (x4/x8) Revision 1.0 DDR SDRAM Rev. 1.0 July. 2003 ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) st. 512Mb E-die Revision History Revision 1.0 (July, 2003) - First version release. DDR SDRAM Rev. 1.0 July. 2003 ...
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... Auto & Self refresh • 7.8us refresh interval(8K/64ms refresh) • Maximum burst refresh cycle : 8 • 66pin TSOP II package Ordering Information Part No. K4H510638E-TC/LAA K4H510638E-TC/LA2 K4H510638E-TC/LB0 K4H510738E-TC/LAA K4H510738E-TC/LA2 K4H510738E-TC/LB0 Operating Frequencies Speed @CL2 Speed @CL2.5 ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) Pin Description DDQ SSQ DDQ SSQ DDQ CAS CAS RAS RAS CS0 CS0 CS1 CS1 AP/A AP ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) Package Physical Dimension #66 #1 0.65 NOTE REFERENCE ASS’Y OUT QUALITY Block Diagram CK,CK,CAS RAS,WE,DM 64Mx4 CKE1,CS1 64Mx4 CKE0,CS0 I/O0-I/O3,DQS st.128Mb x 4 #34 #33 22.62MAX 22.22 ± 0.10 0.25 ± 0.08 66pin TSOPII / Package dimension CK,CK,CAS RAS,WE,DM CKE1,CS1 CKE0,CS0 A0-A12,BA0,BA1 ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) Input/Output Function Description SYMBOL TYPE CK, CK Input CKE Input CS Input RAS, CAS, WE Input DM Input BA0, BA1 Input 12] Input DQ I/O DQS I VDDQ Supply VSSQ Supply VDD Supply VSS Supply VREF Input Clock : CK and CK are differential clock inputs. All address and control input signals are sam- pled on the positive edge of CK and negative edge of CK ...
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... Burst stop command is valid at every burst length. 8. DM(x4x8) sampled at the rising and falling edges of the DQS and Data-in are masked at the both edges (Write DM latency is 0). 9. This combination is not defined for any function, which means "No Operation(NOP)" in DDR SDRAM. CKEn-1 CKEn ...
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... Banks / st. 16M x 8Bit x 4 Banks Double Data Rate SDRAM General Description The K4H510638E / K4H510738E is 536,870,912 bits of double data rate synchronous DRAM organized as 4x 33,553,332 / 4x 16,777,216 words by 4/ 8bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous features with Data Strobe allow extremely high performance up to 266Mb/s per pin ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) DDR SDRAM Spec Items & Test Conditions Operating current - One bank Active-Precharge; tRC=tRCmin; tCK=10ns for DDR200, 7.5ns for DDR266, 6ns for DDR333; DQ,DM and DQS inputs changing once per clock cycle; address and control inputs changing once every two clock cycles. ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) < Detailed test conditions for DDR SDRAM IDD1 & IDD7A > IDD1 : Operating current: One bank operation 1. Only one bank is accessed with tRC(min), Burst Mode, Address and Control inputs on NOP edge are changing once per clock cycle. lout = 0mA 2 ...
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... IDD5 Normal IDD6 Low power IDD7A Symbol AA(DDR266@CL=2.0) IDD0 IDD1 IDD2P IDD2F IDD2Q IDD3P IDD3N IDD4R IDD4W IDD5 Normal IDD6 Low power IDD7A st 128Mx4 (K4H510638E) A2(DDR266@CL=2.0) 100 100 120 120 165 165 140 140 180 180 ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) AC Operating Conditions Parameter/Condition Input High (Logic 1) Voltage, DQ, DQS and DM signals Input Low (Logic 0) Voltage, DQ, DQS and DM signals. Input Differential Voltage, CK and /CK inputs Input Crossing Point Voltage, CK and /CK inputs Notes : 1. VID is the magnitude of the difference between the input level on CK and the input level on /CK. ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) Overshoot/Undershoot specification for Data, Strobe, and Mask Pins Maximum peak amplitude allowed for overshoot Maximum peak amplitude allowed for undershoot The area between the overshoot signal and VDD must be less than or equal to The area between the undershoot signal and GND must be less than or equal to ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) AC Timming Parameters & Specifications Parameter Row cycle time Refresh row cycle time Row active time RAS to CAS delay Row precharge time Row active to Row active delay Write recovery time Last data in to Read command Col. address to Col. address delay CL=2 ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) Parameter Mode register set cycle time DQ & DM setup time to DQS DQ & DM hold time to DQS Control & Address input pulse width DQ & DM input pulse width Power down exit time Exit self refresh to non-Read command Exit self refresh to read command ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) Table 4 : Input/Output Setup & Hold Derating for Rise/Fall Delta Slew Rate Delta Slew Rate tDS +/- 0.0 V/ns 0 +/- 0.25 V/ns +50 +/- 0.5 V/ns +100 Table 5 : Output Slew Rate Characteristice (X4, X8 Devices only) Typical Range Slew Rate Characteristic (V/ns) Pullup Slew Rate 1.2 ~ 2.5 Pulldown slew 1.2 ~ 2.5 Table 6 : Output Slew Rate Characteristice (X16 Devices only) ...
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... DQS will be tran sitioning from High logic LOW previous write was in progress, DQS could be HIGH, LOW, or transitioning from HIGH to LOW at this time, depending on tDQSS maximum of eight AUTO REFRESH commands can be posted to any given DDR SDRAM device. 5. For command/address input slew rate ≥ 1.0 V/ns 6. For command/address input slew rate ≥ ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) b. Pulldown slew rate is measured under the test conditions shown in Figure 2. Output Figure 2 : Pulldown slew rate test load c. Pullup slew rate is measured between (VDDQ/2 - 320 mV +/- 250 mV) Pulldown slew rate is measured between (VDDQ/2 + 320 mV +/- 250 mV) Pullup and Pulldown slew rate conditions are to be met for any pattern of data, including all outputs switching and only one output switching ...
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... DDR SDRAM Output Driver V-I Characteristics DDR SDRAM Output driver characteristics are defined for full and half strength operation as selected by the EMRS bit A1. Figures 3 and 4 show the driver characteristics graphically, and tables 8 and 9 show the same data in tabular format suitable for input into simulation tools ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) Pulldown Current (mA) Typical Typical Voltage (V) Low High 0.1 6.0 6.8 0.2 12.2 13.5 0.3 18.1 20.1 0.4 24.1 26.6 0.5 29.8 33.0 0.6 34.6 39.1 0.7 39.4 44.2 0.8 43.7 49.8 0.9 47.5 55.2 1.0 51.3 60.3 1.1 54.1 65.2 1.2 56.2 69.9 1.3 57.9 74.2 1.4 59.3 78.4 1.5 60.1 82.3 1.6 60.5 85.9 1.7 61.0 89.1 1.8 61.5 92.2 1.9 62.0 95.3 2.0 62.5 97.2 2.1 62.9 99.1 2.2 63.3 100.9 2.3 63.8 101.9 2.4 64.1 102.8 2.5 64.6 103.8 2.6 64.8 104.6 2.7 65.0 105.4 Minimum Maximum 4.6 9.6 9.2 18.2 13.8 26.0 18.4 33.9 23.0 41.8 27.7 49.4 32.2 56.8 36.8 63.2 39.6 69.9 42.6 76.3 44.8 82.5 46.2 88.3 47.1 93.8 47.4 99.1 47.7 103.8 48.0 108.4 48.4 112.1 48.9 115.9 49.1 119.6 49.4 123.3 49.6 126.5 49.8 129.5 49.9 132.4 50.0 135.0 50.2 137.3 50.4 139.2 50.5 140.8 Table 8. Full Strength Driver Characteristics DDR SDRAM pullup Current (mA) ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8 0.0 Pullup Characteristics for Weak Output Driver 0.0 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 Pulldown Characteristics for Weak Output Driver Figure 4. I/V characteristics for input/output buffers:Pull up(above) and pull down(below) 1.0 2.0 1.0 2.0 DDR SDRAM Maximum Typical High ...
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... DDR SDRAM stacked 512Mb E-die (x4/x8) Pulldown Current (mA) Typical Typical Voltage (V) Low High 0.1 3.4 3.8 0.2 6.9 7.6 0.3 10.3 11.4 0.4 13.6 15.1 0.5 16.9 18.7 0.6 19.6 22.1 0.7 22.3 25.0 0.8 24.7 28.2 0.9 26.9 31.3 1.0 29.0 34.1 1.1 30.6 36.9 1.2 31.8 39.5 1.3 32.8 42.0 1.4 33.5 44.4 1.5 34.0 46.6 1.6 34.3 48.6 1.7 34.5 50.5 1.8 34.8 52.2 1.9 35.1 53.9 2.0 35.4 55.0 2.1 35.6 56.1 2.2 35.8 57.1 2.3 36.1 57.7 2.4 36.3 58.2 2.5 36.5 58.7 2.6 36.7 59.2 2.7 36.8 59.6 Minimum Maximum 2.6 5.0 5.2 9.9 7.8 14.6 10.4 19.2 13.0 23.6 15.7 28.0 18.2 32.2 20.8 35.8 22.4 39.5 24.1 43.2 25.4 46.7 26.2 50.0 26.6 53.1 26.8 56.1 27.0 58.7 27.2 61.4 27.4 63.5 27.7 65.6 27.8 67.7 28.0 69.8 28.1 71.6 28.2 73.3 28.3 74.9 28.3 76.4 28.4 77.7 28.5 78.8 28.6 79.7 Table 9. Weak Driver Characteristics DDR SDRAM pullup Current (mA) Typical Typical Minimum Low High -3.5 -4.3 -2.6 -6.9 -8.2 -5.2 -10.3 -12.0 -7.8 -13.6 -15.7 -10.4 -16.9 -19.3 -13.0 -19.4 -22.9 -15.7 -21.5 -26.5 -18.2 -23.3 -30.1 -20.4 -24.8 -33.6 -21.6 -26.0 -37.1 -21.9 -27.1 -40.3 -22.1 -27.8 -43.1 -22.2 -28.3 -45.8 -22.3 -28.6 -48.4 -22.4 -28.7 -50.7 -22.6 -28.9 -52.9 -22.7 -28.9 -55.0 -22.7 -29.0 -56.8 -22.8 -29.2 -58.7 -22.9 -29.2 -60.0 -22.9 -29.3 -61.2 -23.0 -29.5 -62.4 -23.0 -29.5 -63.1 -23.1 -29.6 -63.8 -23.2 -29.7 -64.4 -23.2 -29.8 -65.1 -23.3 -29.9 -65.8 -23.3 Rev. 1.0 July. 2003 Maximum -5.0 -9.9 -14.6 -19.2 -23.6 -28.0 -32.2 -35.8 -39.5 -43.2 -46.7 -50.0 -53.1 -56.1 -58.7 -61.4 -63.5 -65.6 -67.7 -69.8 -71.6 -73.3 -74.9 -76.4 -77.7 -78.8 -79.7 ...