PC87108AVJE NSC [National Semiconductor], PC87108AVJE Datasheet - Page 15

• Manufacturer Part Number: PC87108AVJE
• Description: Advanced UART and Infrared Controller
• Manufacturer: NSC [National Semiconductor]

3.0 Architectural Description
B3 MS__IE – Modem Status Interrupt Enable.
B4 DMA__IE – DMA Interrupt Enable.
B5 UART, Sharp-IR, CEIR Modes
B6 MIR, FIR Modes
B7 TMR__IE – Timer Interrupt Enable.
3.1.3 EIR/FCR – Event Identification/FIFO Control Registers
These registers share the same address.
EIR is accessed during CPU read cycles while FCR is accessed during CPU write cycles.
EIR– Event Identification Register, Read-Only.
The function of this register changes depending upon whether the device is in extended or non-extended mode.
Non-Extended Mode
The function of EIR is the same as in the 16550. It returns an encoded value representing the highest priority pending interrupt.
While a CPU access is occurring, the device records new interrupts, but it does not change the currently encoded value until the
access is complete. Table 3 shows the interrupt priorities and the EIR encoded values.
B0
B2–1 IPR [1–0] – Interrupt Priority.
B3
B5–4 These bits always return 0.
B7–6 FEN [1–0] – FIFOs Enabled.
Bits
Function
Reset State
TXEMP__IE – Transmitter Empty Interrupt Enable.
SIR, MIR, FIR Modes
TXEMP__IE/PLD__IE – Transmitter Empty/Pipeline Load Interrupt Enable.
SFIF__IE – ST__FIFO Interrupt Enable.
IPF – Interrupt Pending Flag.
When this bit is 0, an interrupt is pending.
When it is 1, no interrupt is pending.
When bit 0 is 0, these bits identify the highest priority pending interrupt.
RXFT – RX__FIFO Time-out.
In the 16450 mode this bit is always 0.
In the 16550 mode (FIFOs enabled), this bit is set when an RX__FIFO time-out occurred and the associated interrupt is
currently the highest priority pending interrupt.
These bits are set to 1 when the FIFOs are enabled (bit 0 of FCR set to 1).
FEN1
B7
0
FIGURE 6. Event Identification Register, Non-Extended Mode
FEN0
B6
0
(Continued)
B5
0
0
15
B4
0
0
RXFT
B3
0
IPR1
B2
0
IPR0
B1
0
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IPF
B0
1