UPD64084 NEC, UPD64084 Datasheet - Page 39

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UPD64084

Manufacturer Part Number
UPD64084
Description
THREE-DIMENSIONAL Y/C SEPARATION LSI WITH ON-CHIP MEMORY
Manufacturer
NEC
Datasheet

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15.4 Serial Bus Registers
registers is possible in the write mode (with a slave in reception mode), while reading from the read registers is possible
in the read mode (with a slave in transmission mode). The following table lists how each serial bus register is mapped.
(1) Write register mapping
The
Slave address: 10111000b = B8h (SLA0 = L), 10111010b = BAh (SLA0 = H)
Caution
SA
0A
0B
0C
0D
0E
0F
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
PD64084 incorporates twenty-four 8-bit write registers and seven 8-bit read registers. Writing to the write
CNROFS
HPLLFS
ID1ON
YNRK
SHT0
WSS
It may be necessary to change set values on the serial bus depending on the results of
performance evaluation conducted by NEC Electronics.
D7
0
0
0
0
0
0
SYSPDS
ADCLKS
V1PSEL
YHCOR
DYCOS
CLKS
WSC
HCNTFSYN
ID1DECON
VAPGAIN
ID1W0A1
YNRINV
BPLLFS
NRMD
SHT1
CPP
D6
0
0
0
1
DCCOR
DYCOR
BGPS
HSSL
ADCLPFSW
EXTDYCO
EXADINS
YHCGAIN
ID1W0A2
SELD1FL
ADPDS
FSCFG
VCT
D5
0
0
0
VEGSEL
YNRLIM
NSDS
VTRH
YPFT
TH
Data Sheet S16021EJ2V0DS
ADCLPSTP
MFREEZE
CLK8OFF
ED2OFF
Data Map (SA00-SA17)
NSDSW
PLLFG
HIZEN
HDP
OTT
D4
1
0
0
0
CLKG2D
NRZOFF
FELCHK
VLSEL
CNRK
CC3N
OVST
D3
0
1
0
0
COUTS
PECS
VTRR
ST1S
MSS
CLKGGT
FSCOFF
CNRINV
VLTYPE
VAPINV
CSHDT
C0HS
D2
1
0
1
0
DCGAIN
DYGAIN
BGPW
YPFG
VSSL
KILR
TT
CLKGEB
CLPH
CDL
D1
0
0
0
0
0
CNRLIM
EXCSS
LDSR
VTVH
YAPS
ST0S
KCTT
KILS
PD64084
SELD2FH
CLKGT
VFLTH
D0
1
0
0
0
0
39

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