UPD64084 NEC, UPD64084 Datasheet - Page 15

• Manufacturer Part Number: UPD64084
• Description: THREE-DIMENSIONAL Y/C SEPARATION LSI WITH ON-CHIP MEMORY
• Manufacturer: NEC

3.3
amplitude of the video signal and variations in it. Figure 3-2 shows the waveform of the video signal input whose
amplitude is 140 IRE
white level of up to 131 IRE for the Y signal and up to 175 IRE
3.4
It is necessary to limit the level of video (composite) signal inputs to within a certain range to cope with the maximum
Remark The recommended input level of video signals is 140 IRE
Supply 2.5 V to the AVDD pins. Isolate them sufficiently from the digital section power supply.
Use as wide wiring patterns as possible for the ground lines of each bypass capacitor and the AGND pins so as
to minimize their impedance.
Connect a video signal to the AYI pin by capacitive coupling. Maintain low input impedance for video signals. Be
sure to keep the wiring between the capacitor and the AYI pin as short as possible.
Pull down the VRTY, VRBY and VCOMY reference voltage pins via a 0.1 F bypass capacitor.
Pull down the VCLY pin via a 0.1 F bypass capacitor and a 10 to 47 F electrolysis capacitor.
Do not bring the digital system wiring (especially the memory system) close to this block and the straight
downward of the IC.
Video Signal Input Level
Pin Treatment
AYI pin input
Figure 3-2. Video Signal Input Waveform Example (for 75% Color Bar Input)
p-p
131 IRE
43 IRE
= 820 LSB (0.8 times a maximum input range of 1024 LSB). In this case, it is possible to input a
0 IRE
1.6 V
0.6 V
Data Sheet S16021EJ2V0DS
Sync-tip: 40 IRE = 20 LSB
Pedestal: 0 IRE = 256 LSB
p-p
for the C signal.
p-p
MAX. 131 IRE = 1023 LSB
= 0.8 V
100 IRE = 840 LSB
p-p
(1.00 V
0.8).
1023
896
768
640
512
384
256
128
0
PD64084
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