XR17L154CV EXAR [Exar Corporation], XR17L154CV Datasheet - Page 7

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XR17L154CV

Manufacturer Part Number
XR17L154CV
Description
3.3V PCI BUS QUAD UART
Manufacturer
EXAR [Exar Corporation]
Datasheet
XR17L154
3.3V PCI BUS QUAD UART
REV. 1.1.0
The XR17L154 UART has three different sets of registers as shown in
configuration space registers are for plug-and-play auto-configuration when connecting the device to the PCI
bus. This auto-configuration feature makes installation very easy into a PCI system and it is part of the PCI
local bus specification. The second register set is the device configuration registers that are accessible directly
from the PCI bus for programming general operating conditions of the device and monitoring the status of
various functions. These registers are mapped into 2K of the PCI bus memory address space. These functions
include all 4 channel UART’s interrupt control and status, 16-bit general purpose timer control and status,
multipurpose inputs/outputs control and status, sleep mode, soft-reset, and device identification and revision.
And lastly, each UART channel has its own set of 5G internal UART configuration registers for its own operation
control and status reporting. All 4 sets of channel registers are embedded inside the device configuration
registers space, which provides faster access. The following paragraphs describe all 3 sets of registers in
detail.
The PCI local bus configuration space registers are responsible for setting up the device’s operating
environment in the PCI local bus. The pre-defined operating parameters of the device are read by the PCI bus
plug-and-play auto-configuration manager in the operating system. After the PCI bus has collected all data
from every device/card on the bus, it defines and downloads the memory mapping information to each device/
card about their individual operation memory address location and conditions. The operating memory mapped
address location is downloaded into the Base Address Register (BAR) register, 0x10. The plug-and-play auto
configuration feature is only available when an external 93C46 EEPROM is used. The EEPROM contains the
device vendor and sub-vendor data required by the auto-configuration setup.
F
1.0 XR17L154 REGISTERS
1.1
IGURE
3. T
PCI LOCAL BUS CONFIGURATION SPACE REGISTERS
Device Configuration and
Registers are mapped on
UART[3:0] Configuration
byte of memory address
Register (BAR) in a 2K-
PCI Local Bus
to the Base Address
HE
Interface
Target
XR17L154 R
space
EGISTER
S
ETS
Configuration Space
Registers for Plug-
PCI Local Bus
and-Play Auto
TIMER, REG
Configuration
Channel 2
Channel 3
Channel 0
Channel 0
Channel 1
INT, MPIO,
7
0x07FF
0x0000
0x0080
0x0100
0x0200
0x0400
0x0600
and Product Model Number
Vendor and Sub-vendor ID
in External EEPROM
Device Configuration Registers
16550 Compatible and EXAR
Sleep, Reset, DVID, DREV
UART[3:0] Configuration
16-bit Timer/Counter,
4 channel Interrupts,
Enhanced Registers
Multipurpose I/Os,
Figure
Registers
DISCONTINUED
3. The PCI local bus
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PCIREGS-1

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