XR16C850CM EXAR [Exar Corporation], XR16C850CM Datasheet - Page 56

• Manufacturer Part Number: XR16C850CM
• Description: 2.97V TO 5.5V UART WITH 128-BYTE FIFO
• Manufacturer: EXAR [Exar Corporation]

XR16C850
2.97V TO 5.5V UART WITH 128-BYTE FIFO
3.0 UART INTERNAL REGISTERS ...........................................................................................................25
4.0 INTERNAL REGISTER DESCRIPTIONS .............................................................................................27
ABSOLUTE MAXIMUM RATINGS...................................................................................42
ELECTRICAL CHARACTERISTICS ................................................................................42
T
ABLE OF
T
DC E
AC E
TA=0
APPLICABLE
P
P
YPICAL PACKAGE THERMAL RESISTANCE DATA
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY ............................................................................... 27
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................ 27
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE .............................................................................. 27
4.4 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY ............................................................................... 29
4.5 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY ...................................................................................... 30
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE ...................................................................................... 32
4.7 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE 34
4.8 LINE STATUS REGISTER (LSR) - READ ONLY ........................................................................................... 35
4.9 MODEM STATUS REGISTER (MSR) - READ ONLY .................................................................................... 36
4.10 SCRATCH PAD REGISTER (SPR) - READ/WRITE .................................................................................... 36
4.11 ENHANCED MODE SELECT REGISTER (EMSR) ...................................................................................... 37
4.12 FIFO LEVEL REGISTER (FLVL) - READ-ONLY .......................................................................................... 37
4.13 BAUD RATE GENERATOR REGISTERS (DLL AND DLM) - READ/WRITE .............................................. 37
4.14 DEVICE IDENTIFICATION REGISTER (DVID) - READ ONLY .................................................................... 37
4.15 DEVICE REVISION REGISTER (DREV) - READ ONLY .............................................................................. 37
4.16 TRIGGER LEVEL / FIFO DATA COUNT REGISTER (TRG) - WRITE-ONLY ............................................. 37
4.17 FIFO DATA COUNT REGISTER (FC) - READ-ONLY .................................................................................. 37
4.18
4.19 ENHANCED FEATURE REGISTER (EFR) .................................................................................................. 39
4.20 SOFTWARE FLOW CONTROL REGISTERS (XOFF1, XOFF2, XON1, XON2) - READ/WRITE ................ 40
ACKAGE
ACKAGE
T
T
T
T
T
T
T
T
T
F
F
F
F
F
F
F
F
F
F
F
F
F
F
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
LECTRICAL
LECTRICAL
O TO
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................. 27
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION ................................................................ 28
4.4.1 INTERRUPT GENERATION: ...................................................................................................................................... 29
4.4.2 INTERRUPT CLEARING: ........................................................................................................................................... 29
FEATURE CONTROL REGISTER (FCTR) - READ/WRITE ........................................................................ 38
7: XR16C850 UART INTERNAL REGISTERS ................................................................................................................. 25
8:
9: I
10: T
11: P
12: S
13: T
14: S
15: UART RESET CONDITIONS ...................................................................................................................................... 41
17. C
18. M
19. D
20. D
22. D
21. D
24. D
23. D
25. R
26. T
27. R
28. R
29. T
30. T
D
D
C
70
..................................................................................................................................................43
IMENSIONS
IMENSIONS
NTERRUPT
ONTENTS
INTERNAL REGISTERS DESCRIPTION. S
O
RANSMIT AND
RIGGER
ARITY SELECTION
CRATCHPAD
OFTWARE
RANSMIT
RANSMIT
RANSMIT
C (-40
LOCK
ATA
ATA
ATA
ATA
ATA
ATA
ECEIVE
ECEIVE
ECEIVE
ODEM
C
C
HARACTERISTICS
HARACTERISTICS
B
B
B
B
B
B
T
US
US
US
US
US
US
T
I
IMING
NPUT
S
R
R
R
ABLE
O TO
F
R
R
R
OURCE AND
R
W
W
R
W
R
EADY
EADY
EADY
LOW
(48
(44
EADY
EADY
EADY
EAD
EAD
EAD
S
RITE
RITE
RITE
............................................................................................................
R
/O
WAP
............................................................................................................................................................. 45
S
ECEIVE
+85
UTPUT
& I
& I
& I
ELECT
C
PIN TQFP
PIN
T
T
T
........................................................................................................................................................ 33
T
T
T
& I
& I
& I
ONTROL
IMING IN
IMING IN
IMING IN
S
IMING IN
IMING IN
IMING IN
NTERRUPT
NTERRUPT
NTERRUPT
ELECTION
NTERRUPT
NTERRUPT
NTERRUPT
O
PLCC) .........................................................................................................53
P
................................................................................................................................................ 38
C
FIFO T
T
RIORITY
IMING
FOR INDUSTRIAL GRADE PACKAGE
F
..............................................................................................................42
..............................................................................................................43
I
I
PC M
NTEL
NTEL
I
I
PC M
UNCTIONS
NTEL
NTEL
- 7
T
T
T
RIGGER
.................................................................................................................................... 37
.................................................................................................................................... 45
IMING
T
IMING
IMING
T
T
L
X
ODE
B
B
IMING
IMING
IMING
EVEL
ODE
B
B
US
US
7
US
US
.......................................................................................................................... 48
X
M
M
[N
[FIFO M
[FIFO M
........................................................................................................................ 39
........................................................................................................................ 48
T
M
M
....................................................................................................................... 30
[N
[FIFO M
[FIFO M
ODE WITH
ODE USING
ABLE AND
1
ON
ODE WITH
ODE USING
(
ON
MARGIN OF ERROR
mm
-FIFO M
HADED BITS ARE ENABLED WHEN
-FIFO M
ODE
ODE
)....................................................................................52
ODE
ODE
AS#
L
II
, DMA D
, DMA E
AS#
AS# ............................................................................................. 47
EVEL
ODE
, DMA M
, DMA M
AS#............................................................................................ 47
ODE
TIED TO
] ............................................................................................ 49
TIED TO
S
] .......................................................................................... 49
ELECTION
NABLED
ISABLED
ODE
ODE
GND ......................................................................... 46
GND ........................................................................ 46
: ± 15%)..................................................42
D
E
), V
] ........................................................................... 50
NABLED
] .......................................................................... 50
ISABLED
.......................................................................... 32
CC IS
]............................................................... 51
] .............................................................. 51
EFR B
2.97V
IT
-4=1......................................... 26
TO
5.5V, 70
xr
P
F L
OAD WHERE
REV. 2.3.1
I