XR16C850CM EXAR [Exar Corporation], XR16C850CM Datasheet - Page 54

• Manufacturer Part Number: XR16C850CM
• Description: 2.97V TO 5.5V UART WITH 128-BYTE FIFO
• Manufacturer: EXAR [Exar Corporation]

REVISION HISTORY
XR16C850
2.97V TO 5.5V UART WITH 128-BYTE FIFO
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to
improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any
circuits described herein, conveys no license under any patent or other right, and makes no representation that
the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration
purposes and may vary depending upon a user’s specific application. While the information in this publication
has been carefully checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the
failure or malfunction of the product can reasonably be expected to cause failure of the life support system or
to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless
EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has
been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately
protected under the circumstances.
Copyright 2005 EXAR Corporation
Datasheet August 2005.
Send your UART technical inquiry with technical details to hotline: [e-mail].
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
February 2000
April 2002
January 2003
May 2003
June 2003
March 2004
August 2005
D
ATE
Rev 1.0.0
Rev 2.0.0
Rev 2.1.0
Rev 2.1.1
Rev 2.2.0
Rev 2.3.0
Rev 2.3.1
R
EVISION
Initial datasheet.
Changed to standard style format. Internal Registers are described in the order they
are listed in the Internal Register Table. Clarified timing diagrams. Corrected Auto
RTS Hysteresis table. Renamed Rclk (Receive Clock) to Bclk (Baud Clock) and tim-
ing symbols. Added T
Changed to single column format. Added Factory Test Mode description and work-
around.
Corrected patent number on first page.
Added and Updated Device Status in Ordering Information: 40-pin PDIP and 52-pin
QFP are discontinued.
Devices with top mark date code of "F2 YYWW" and newer have 5V tolerant inputs
(except for XTAL1) and have 0 ns address hold time (T
(SEE”FACTORY TEST MODE” ON PAGE 7.
updated to 0x06. In addition, the packages are now in Green Molding Compound.
Removed discontinued packages (40-pin PDIP and 52-pin QFP) from Ordering Infor-
mation.
NOTICE
AH
54
, T
CS
and OSC.
D
ESCRIPTION
) was improved and DREV register was
AH
). Factory test mode entry
xr
REV. 2.3.1