XCF16PVO48C XILINX [Xilinx, Inc], XCF16PVO48C Datasheet - Page 15

• Manufacturer Part Number: XCF16PVO48C
• Description: Platform Flash In-System Programmable Configuration PROMs
• Manufacturer: XILINX [Xilinx, Inc]

Initiating FPGA Configuration
The options for initiating FPGA configuration via the
Platform Flash PROM include:
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Following the FPGA’s power-on sequence or the assertion
of the PROG_B (or PROGRAM) pin the FPGA’s
configuration memory is cleared, the configuration mode is
selected, and the FPGA is ready to accept a new
configuration bitstream. The FPGA’s PROG_B pin can be
controlled by an external source, or alternatively, the
Platform Flash PROMs incorporate a CF pin that can be
tied to the FPGA’s PROG_B pin. Executing the CONFIG
instruction through JTAG pulses the CF output Low once for
300-500 ns, resetting the FPGA and initiating configuration.
DS123 (v2.11.1) March 30, 2007
Product Specification
Automatic configuration on power up
Applying an external PROG_B (or PROGRAM) pulse
Applying the JTAG CONFIG instruction
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Platform Flash In-System Programmable Configuration PROMs
The iMPACT software can issue the JTAG CONFIG
command to initiate FPGA configuration by setting the
"Load FPGA" option.
When using the XCFxxP Platform Flash PROM with design
revisioning enabled, the CF pin should always be connected
to the PROG_B (or PROGRAM) pin on the FPGA to ensure
that the current design revision selection is sampled when
the FPGA is reset. The XCFxxP PROM samples the current
design revision selection from the external REV_SEL pins
or the internal programmable Revision Select bits on the
rising edge of CF. When the JTAG CONFIG command is
executed, the XCFxxP samples the new design revision
selection before initiating the FPGA configuration
sequence. When using the XCFxxP Platform Flash PROM
without design revisioning, if the CF pin is not connected to
the FPGA PROG_B (or PROGRAM) pin, then the XCFxxP
CF pin must be tied High.
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