XCF01SF48 XILINX [Xilinx, Inc], XCF01SF48 Datasheet - Page 7

• Manufacturer Part Number: XCF01SF48
• Description: Platform Flash In-System Programmable Configuration PROMS
• Manufacturer: XILINX [Xilinx, Inc]

See the XCFxxS/XCFxxP Pin Names and Descriptions
Tables in the
boundary-scan bit order for all connected device pins, or
see the appropriate BSDL file for the complete bound-
ary-scan bit order description under the "attribute
BOUNDARY_REGISTER" section in the BSDL file. The bit
assigned to boundary-scan cell "0" is the LSB in the bound-
ary-scan register, and is the register bit closest to TDO.
Identification Registers
IDCODE Register
The IDCODE is a fixed, vendor-assigned value that is used
to electrically identify the manufacturer and type of the
device being addressed. The IDCODE register is 32 bits
wide. The IDCODE register can be shifted out for examina-
tion by using the IDCODE instruction. The IDCODE is avail-
able to any other system component via JTAG.
the IDCODE register values for the Platform Flash PROMs.
The IDCODE register has the following binary format:
where
v = the die version number
f = the PROM family code
a = the specific Platform Flash PROM product ID
c = the Xilinx manufacturer's ID
The LSB of the IDCODE register is always read as logic "1"
as defined by IEEE Std. 1149.1.
Table 7: IDCODES Assigned to Platform Flash PROMs
DS123 (v2.6) March 14, 2005
Preliminary Product Specification
Notes:
1.
vvvv:ffff:ffff:aaaa:aaaa:cccc:cccc:ccc1
The <v> in the IDCODE field represents the device’s revision
code (in hex), and may vary.
XCF01S
XCF02S
XCF04S
XCF08P
XCF16P
XCF32P
Device
R
Pinouts and Pin Descriptions
IDCODE
<v>5044093
<v>5045093
<v>5046093
<v>5057093
<v>5058093
<v>5059093
section for the
(1)
Table 7
(hex)
www.xilinx.com
Platform Flash In-System Programmable Configuration PROMS
lists
USERCODE Register
The USERCODE instruction gives access to a 32-bit user
programmable scratch pad typically used to supply informa-
tion about the device's programmed contents. By using the
USERCODE instruction, a user-programmable identifica-
tion code can be shifted out for examination. This code is
loaded into the USERCODE register during programming of
the Platform Flash PROM. If the device is blank or was not
loaded during programming, the USERCODE register con-
tains FFFFFFFFh.
Customer Code Register
For the XCFxxP Platform Flash PROM, in addition to the
USERCODE, a unique 32-byte Customer Code can be
assigned to each design revision enabled for the PROM.
The Customer Code is set during programming, and is typ-
ically used to supply information about the design revision
contents. A private JTAG instruction is required to read the
Customer Code. If the PROM is blank, or the Customer
Code for the selected design revision was not loaded during
programming, or if the particular design revision is erased,
the Customer Code will contain all ones.
Platform Flash PROM TAP
Characteristics
The Platform Flash PROM family performs both in-system
programming and IEEE 1149.1 boundary-scan (JTAG) test-
ing via a single 4-wire Test Access Port (TAP). This simpli-
fies system designs and allows standard Automatic Test
Equipment to perform both functions. The AC characteris-
tics of the Platform Flash PROM TAP are described as fol-
lows.
TAP Timing
Figure 6
These TAP timing characteristics are identical for both
boundary-scan and ISP operations.
shows the timing relationships of the TAP signals.
7