XCF01SF48 XILINX [Xilinx, Inc], XCF01SF48 Datasheet - Page 40

• Manufacturer Part Number: XCF01SF48
• Description: Platform Flash In-System Programmable Configuration PROMS
• Manufacturer: XILINX [Xilinx, Inc]

Revision History
The following table shows the revision history for this document.
DS123 (v2.6) March 14, 2005
Preliminary Product Specification
04/29/03
06/03/03
12/15/03
05/07/04
11/05/03
11/18/03
Date
R
Version
1.0
1.1
2.0
2.1
2.2
2.3
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Xilinx Initial Release.
Made edits to all pages.
Major revision.
Pinout corrections as follows:
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Added specification (4.7k
section
Added paragraph to section
resistor and/or buffer on the DONE pin.
Table
-
-
Table 13
-
-
Figure 18
Section
limit to itemized features.
Section
BUSY to the descriptive text.
Table 2, page
Section
Section
page 10
to the FPGA’s PROG_B (PROGRAM) input.
Figure 8, page
directionality of the CF pin in each configuration.
Section
Table 10, page
document the Low state of CF.
Section
devices.
Section
page
-
-
Section
-
-
-
-
(Continued on next page)
For VO48 package, removed 38 from VCCINT and added it to VCCO.
For FS48 package, removed pin D6 from VCCINT and added it to VCCO.
For pin D6, changed name from VCCINT to VCCO.
For pin A4, changed name from GND to DNC.
Revised footnote callout number on T
Added Footnote (2) callout to T
Added Typical (Typ) parameter columns and parameters for V
V
Added 1.5V operation parameter row to V
Revised V
Added parameter row T
24:
CCO
12:
Reset and Power-On Reset Activation, page
Features, page
Description, page 1
Design Revisioning, page
PROM to FPGA Configuration Mode and Connections Summary,
I/O Input Voltage Tolerance and Power Sequencing, page
Absolute Maximum Ratings, page
Supply Voltage Requirements for Power-On Reset and Power-Down,
Recommended Operating Conditions, page
and following, five instances: Added instruction to tie CF High if it is not tied
(FS48 package):
/V
(VO48 package): For pin 38, changed name from VCCINT to VCCO.
CCJ
3: Updated Virtex-II configuration bitstream sizes.
IH
14, through
.
23: Added CF column to truth table, and added an additional row to
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Platform Flash In-System Programmable Configuration PROMS
Min, 2.5V operation, from 2.0V to 1.7V.
1: Added package styles and 33 MHz configuration speed
Figure 15, page
IN
for recommended pull-up resistor on OE/RESET pin to
Standby Mode, page
and following: Added state conditions for CF and
and Max parameters
Revision
VCC
9: Rewritten.
.
OER
21: Added footnote indicating the
24: Revised V
IL
from Footnote (4) to Footnote (3).
and V
22, concerning use of a pull-up
IH
22.
25:
, ’P’ devices.
IN
and V
CCINT
TS
22: Rewritten.
for ’P’
and
40