XCF01SF48 XILINX [Xilinx, Inc], XCF01SF48 Datasheet

XCF01SF48

Manufacturer Part Number

XCF01SF48

Description

Platform Flash In-System Programmable Configuration PROMS

Manufacturer

XILINX [Xilinx, Inc]

Datasheet

1.XCF01SF48.pdf (42 pages)

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DS123 (v2.6) March 14, 2005

Features

•

Table 1: Platform Flash PROM Features

Description

Xilinx introduces the Platform Flash series of in-system pro-

grammable configuration PROMs. Available in 1 to 32

Megabit (Mbit) densities, these PROMs provide an

easy-to-use, cost-effective, and reprogrammable method

for storing large Xilinx FPGA configuration bitstreams. The

Platform Flash PROM series includes both the 3.3V

XCFxxS PROM and the 1.8V XCFxxP PROM. The XCFxxS

version includes 4-Mbit, 2-Mbit, and 1-Mbit PROMs that

DS123 (v2.6) March 14, 2005

Preliminary Product Specification

XCF01S

XCF02S

XCF04S

XCF08P

XCF16P

XCF32P

In-System Programmable PROMs for Configuration of

Xilinx FPGAs

Low-Power Advanced CMOS NOR FLASH Process

Endurance of 20,000 Program/Erase Cycles

Operation over Full Industrial Temperature Range

(–40°C to +85°C)

IEEE Standard 1149.1/1532 Boundary-Scan (JTAG)

Support for Programming, Prototyping, and Testing

JTAG Command Initiation of Standard FPGA

Configuration

Cascadable for Storing Longer or Multiple Bitstreams

Dedicated Boundary-Scan (JTAG) I/O Power Supply

I/O Pins Compatible with Voltage Levels Ranging From

1.5V to 3.3V

Design Support Using the Xilinx Alliance ISE and

Foundation ISE Series Software Packages

CCJ

)

All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.

16 Mbit

32 Mbit

Density

1 Mbit

2 Mbit

4 Mbit

8 Mbit

3.3V

1.8V

CCINT

1.8V - 3.3V

1.5V - 3.3V

CCO

Range

2.5V - 3.3V

CCJ

Range

Platform Flash In-System Programmable

VO20/VOG20

VO48/VOG48

FS48/FSG48

www.xilinx.com

Packages

•

support Master Serial and Slave Serial FPGA configuration

modes

16-Mbit, and 8-Mbit PROMs that support Master Serial,

Slave Serial, Master SelectMAP, and Slave SelectMAP

FPGA configuration modes

Platform Flash PROM family members and supported fea-

tures is shown in

XCF01S/XCF02S/XCF04S

XCF08P/XCF16P/XCF32P

Programming

JTAG ISP

(Figure

3.3V supply voltage

Serial FPGA configuration interface (up to 33 MHz)

Available in small-footprint VO20 and VOG20

packages.

1.8V supply voltage

Serial or parallel FPGA configuration interface

(up to 33 MHz)

Available in small-footprint VO48, VOG48, FS48,

and FSG48 packages

Design revision technology enables storing and

accessing multiple design revisions for

configuration

Built-in data decompressor compatible with Xilinx

advanced compression technology

1). The XCFxxP version includes 32-Mbit,

Table

Config.

Serial

Configuration PROMS

Preliminary Product Specification

Parallel

Config.

(Figure

Revisioning

Design

2). A summary of the

Compression

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