CY14B101L-SP25XI CYPRESS [Cypress Semiconductor], CY14B101L-SP25XI Datasheet - Page 13

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CY14B101L-SP25XI

Manufacturer Part Number
CY14B101L-SP25XI
Description
1 Mbit (128K x 8) nvSRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Hardware STORE Cycle
Switching Waveforms
Notes
Document Number: 001-06400 Rev. *J
t
t
t
18. On a hardware STORE initiation, SRAM operation continues to be enabled for time t
19. This is the amount of time to take action on a soft sequence command. Vcc power must remain high to effectively register command.
20. Commands such as Store and Recall lock out I/O until operation is complete which further increases this time. See specific command.
PHSB
DELAY
ss
Parameter
[19, 20]
[18]
t
t
HLHX
HLQZ ,
Alt
t
BLQZ
Hardware STORE Pulse Width
Time Allowed to Complete SRAM Cycle
Soft Sequence Processing Time
Figure 13. Soft Sequence Processing
Figure 12. Hardware STORE Cycle
Description
DELAY
to allow read and write cycles to complete.
[19, 20]
Min
15
1
CY14B101L
Max
CY14B101L
70
70
Page 13 of 18
Unit
ns
μs
us
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