CY14B101L-SP25XI CYPRESS [Cypress Semiconductor], CY14B101L-SP25XI Datasheet

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CY14B101L-SP25XI

Manufacturer Part Number
CY14B101L-SP25XI
Description
1 Mbit (128K x 8) nvSRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Features
Cypress Semiconductor Corporation
Document Number: 001-06400 Rev. *J
25 ns, 35 ns, and 45 ns Access Times
Pin compatible with STK14CA8
Hands off Automatic STORE on Power Down with only a small
Capacitor
STORE to QuantumTrap™ Nonvolatile Elements is initiated by
software, hardware, or AutoStore™ on Power Down
RECALL to SRAM initiated by Software or Power Up
Unlimited READ, WRITE, and RECALL Cycles
200,000 STORE Cycles to QuantumTrap
20 year Data Retention at 55°C
Single 3V +20%, –10% Operation
Commercial and Industrial Temperature
32-pin (300 mil) SOIC and 48-pin (300 mil) SSOP packages
RoHS Compliance
Logic Block Diagram
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
A
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
5
6
7
8
9
12
13
14
15
16
198 Champion Court
A
0
COLUMN DEC
A
COLUMN IO
1024 X 1024
1
STATIC RAM
A
ARRAY
2
A
3
A
4
A
QuantumTrap
10
1024 x 1024
A
11
Functional Description
The Cypress CY14B101L is a fast static RAM with a nonvolatile
element in each memory cell. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM provides
unlimited read and write cycles, while independent, nonvolatile
data resides in the highly reliable QuantumTrap cell. Data
transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power down. On
power up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. Both the STORE and RECALL
operations are also available under software control.
STORE
RECALL
1 Mbit (128K x 8) nvSRAM
San Jose
,
CA 95134-1709
V
CONTROL
CONTROL
CC
RECALL
POWER
STORE/
V
CAP
SOFTWARE
DETECT
Revised April 20, 2009
CY14B101L
HSB
408-943-2600
A
15
OE
CE
WE
-
A
0
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CY14B101L-SP25XI Summary of contents

Page 1

... Document Number: 001-06400 Rev Mbit (128K x 8) nvSRAM Functional Description The Cypress CY14B101L is a fast static RAM with a nonvolatile element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the world’s most reliable nonvolatile memory. The SRAM provides unlimited read and write cycles, while independent, nonvolatile data resides in the highly reliable QuantumTrap cell ...

Page 2

... DQ0 DQ1 5 DQ2 Description CY14B101L HSB ...

Page 3

... SRAM. In addition, it provides unlimited RECALL opera- tions from the nonvolatile cells and up to one million STORE operations. SRAM Read The CY14B101L performs a READ cycle whenever CE and OE are LOW while WE and HSB are HIGH. The address specified on pins A determines the 131,072 data bytes accessed. ...

Page 4

... V is less than V HRECALL CC If the CY14B101L WRITE mode (both CE and WE are low) at power up after a RECALL or after a STORE, the WRITE is inhibited until a negative transition detected. This protects against inadvertent writes during power up or brown out conditions. ...

Page 5

... Customers that want to use a larger V to make sure there is extra store charge should discuss their V size selection with Cypress to understand any impact on CAP the Vcap voltage level at the end CY14B101L value because CAP value CAP period. RECALL ...

Page 6

... The six consecutive address locations are in the order listed HIGH during all six cycles to enable a nonvolatile cycle. 2. While there are 17 address lines on the CY14B101L, only the lower 16 lines are used to control software modes state depends on the state of OE. The IO table shown is based on OE Low. ...

Page 7

... Max, V < V < Max, V < V < > – pin and Vss, 6V rated. CAP CY14B101L Ambient Temperature V CC 0°C to +70°C 2.7V to 3.6V -40°C to +85°C 2.7V to 3.6V Min Max Commercial Industrial – ...

Page 8

... MHz 3.0V CC [6] Test Conditions Test conditions follow standard test methods and procedures for measuring thermal impedance, per EIA / JESD51. Figure 4. AC Test Loads 3.0V Output 789Ω CY14B101L Min Unit 20 Years 200 K Max Unit 32-SOIC 48-SSOP Unit ° ...

Page 9

... Measured ±200 mV from steady state output voltage. 10. HSB must remain high during READ and WRITE cycles. Document Number: 001-06400 Rev Description Min Max CY14B101L Unit Min Max Min Max ...

Page 10

... WC t SCE PWE t SD DATA VALID t HZWE HIGH IMPEDANCE SCE PWE t SD DATA VALID HIGH IMPEDANCE CY14B101L Unit Min Max Min Max ...

Page 11

... If an SRAM WRITE has not taken place since the last nonvolatile cycle, no STORE will take place. 15. Industrial Grade devices requires 15 ms max. Document Number: 001-06400 Rev. *J Description Rise Time CC Figure 9. AutoStore/Power Up RECALL t STORE t HRECALL SWITCH . SWITCH CY14B101L CY14B101L Unit Min Max 20 ms 12.5 ms 2.65 V μs 150 No STORE occurs STORE occurs only if a SRAM write ...

Page 12

... Description Min DATA VALID DATA VALID CY14B101L Max Min Max Min Max 120 120 120 [17 STORE RECALL HIGH IMPEDANCE [17 ...

Page 13

... Commands such as Store and Recall lock out I/O until operation is complete which further increases this time. See specific command. Document Number: 001-06400 Rev. *J Description Figure 12. Hardware STORE Cycle [19, 20] Figure 13. Soft Sequence Processing to allow read and write cycles to complete. DELAY CY14B101L CY14B101L Unit Min Max 15 ns μ ...

Page 14

... NVSRAM 14 - AutoStore + Software Store + Hardware Store Cypress Ordering Information Speed Ordering Code (ns) 25 CY14B101L-SZ25XCT CY14B101L-SZ25XC CY14B101LL-SP25XCT CY14B101LL-SP25XC CY14B101L-SZ25XIT CY14B101L-SZ25XI CY14B101L-SP25XIT CY14B101L-SP25XI 35 CY14B101L-SZ35XCT CY14B101L-SZ35XC CY14B101L-SP35XCT CY14B101L-SP35XC CY14B101L-SZ35XIT CY14B101L-SZ35XI CY14B101L-SP35XIT CY14B101L-SP35XI Document Number: 001-06400 Rev. *J Option T - Tape and Reel Blank - Std. Temperature C - Commercial (0 to 70° Industrial (– ...

Page 15

... Ordering Code (ns) 45 CY14B101L-SZ45XCT CY14B101L-SZ45XC CY14B101L-SP45XCT CY14B101L-SP45XC CY14B101L-SZ45XIT CY14B101L-SZ45XI CY14B101L-SP45XIT CY14B101L-SP45XI All parts are Pb-free. The above table contains Final information. Please contact your local Cypress sales representative for availability of these parts Package Diagrams 16 17 0.810[20.574] 0.822[20.878] 0.050[1.270] TYP ...

Page 16

... Package Diagrams (continued) Figure 15. 48-Pin Shrunk Small Outline Package (51-85061) Document Number: 001-06400 Rev. *J CY14B101L 51-85061-*C Page [+] Feedback ...

Page 17

... Document History Page Document Title: CY14B101L 1 Mbit (128K x 8) nvSRAM Document Number: 001-06400 Orig. of Rev. ECN No. Change ** 425138 TUP *A 437321 TUP *B 471966 TUP *C 503272 PCI *D 597002 TUP *E 688776 VKN *F 1349963 UHA/SFV *G 2427986 GVCH *H 2546756 GVCH/AESA Document Number: 001-06400 Rev. *J Submission Description of Change ...

Page 18

... Document Title: CY14B101L 1 Mbit (128K x 8) nvSRAM Document Number: 001-06400 Orig. of Rev. ECN No. Change *I 2625139 GVCH/PYRS *J 2695908 GVCH/AESA Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress ...

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