TMC22151AKHC CADEKA [Cadeka Microcircuits LLC.], TMC22151AKHC Datasheet - Page 10

• Manufacturer Part Number: TMC22151AKHC
• Description: Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit
• Manufacturer: CADEKA [Cadeka Microcircuits LLC.]

TMC22x5yA
10
Reg
2D
2D
2E
2E
3A
3B
3C
3C
3C
3C
2F
30
30
30
30
30
30
30
30
31
32
33
33
33
33
34
35
36
37
37
37
37
38
39
3D
3E
3F
3F
3F
1-0
7-1
7-0
7-0
7-0
6-4
2-0
7-0
7-0
7-0
7-6
5-4
3-2
1-0
7-0
7-0
7-0
7-0
7-6
5-4
3-2
1-0
7-0
7-0
5-0
Bit
2
0
7
6
5
4
3
2
1
0
7
3
7
6
Name
YOFF1
SG1
SYSPH1
VAXIS1
SYSPH1
LGF
LGEN
LGEXT
PGG
PGEN
PGEXT
PG
LG
FG
LG
PG
GY
BU
RV
GY
BU
RV
Y
M
U
V
Y
M
U
V
TEST
TEST
VBIT20
PEDDIS
CCDEN
Auto-increment stops at 3F
Vertical Blanking Control
9-2
9-2
1-0
1-0
9-2
1-0
9-2
1-0
7-0
8
9-2
9-2
1-0
1-0
Video Measurement
7-0
10-8
9-2
1-0
7-0
8
Test Control
14-7
5-0
6-0
Y offset, msb
Msync gain, 2 msbs
7 lsbs of phase
V axis flip
8 msbs of phase
Line grab flag
Line grab enable
Ext line grab enable
reserved, set to zero
Pixel grab gate
Pixel grab enable
Ext pixel grab enable
Pixel grab, 8 lsbs
Line grab, 8 lsbs
reserved, set to zero
Field grab number
Msb of line grab
Pixel grab, 3 msbs
G/Y grab, 8 msbs
B/U grab, 8 msbs
R/V grab, 8 msbs
reserved
G/Y grab, 2 lsbs
B/U grab, 2 lsbs
R/V grab, 2 lsbs
Luma grab, 8 msbs
Msync grab, 8 msbs
U grab, 8 msbs
V grab, 8 msbs
Luma grab, 2 lsbs
Msync grab, 2 lsbs
U grab, 2 lsbs
V grab, 2 lsbs
Must be set to zero
Must be set to zero
V bit control
Pedestal control
Closed caption control
set to zero
Function
Notes:
1. Functions are listed in the order of reading and writing.
2. For each register listed above up to register 3F, all bits not
Reg
4C-
48-
4A
4B
4B
4B
FF
40
41
41
41
41
41
41
41
41
42
42
42
42
43
43
43
43
43
43
43
44
44
45
46
47
specified are reserved and must be set to zero to ensure
proper operation.
7-0
4-0
1-0
6-0
7-0
7-0
7-0
7-0
6-5
4-0
7-0
Bit
7
6
5
4
3
2
1
0
7
6
5
7
6
5
4
3
2
7
7
Name
DDSPH
LINEST
BGST
VACT2
PALODD
VFLY
FGRAB
LGRAB
PGRAB
FLD
VBLK
HBLK
LID
YGO
YGU
UBO
UBU
VRO
VRU
MONO
FPERR
DRS
PARTID
REVID
PKILL
CFSTAT
XOP
Status - Read Only
DDS phase, 8 msbs
Pixel count reset
Start of burst gate
Half line flag
PAL Ident
Vertical count reset
Field grab
Line grab
Pixel grab
Field flag (F in D1 output)
Vertical blanking (V in D1
output)
Horizontal blanking (H in
D1 output)
Line identification
Y/G overflow
Y/G underflow
C
C
C
C
reserved
Color kill active
Frequency/Phase error
DRS signal
Reads back xx
Revision number
reserved
Phase kill from comb fail
Comb filter status
XLUT output
reserved
B
B
R
R
/B overflow
/B underflow
/R overflow
/R underflow
PRODUCT SPECIFICATION
Function
REV. 1.0.0 2/4/03
h