AT43USB355M-AC ATMEL [ATMEL Corporation], AT43USB355M-AC Datasheet - Page 50

• Manufacturer Part Number: AT43USB355M-AC
• Description: Full-speed USB Microcontroller with Embedded Hub, ADC and PWM
• Manufacturer: ATMEL [ATMEL Corporation]

Figure 16. Effects on Unsynchronized OCR1 Latching
Note:
50
X = A or B
AT43USB355
Unsynchronized
Synchronized
Table 16. Compare1 Mode Select in PWM Mode
Note:
Note that in the PWM mode, the 10 least significant OCR1A/OCR1B bits, when written, are
transferred to a temporary location. They are latched when Timer/Counter1 reaches the value
TOP. This prevents the occurrence of odd-length PWM pulses (glitches) in the event of an
unsynchronized OCR1A/OCR1B write. See Figure 16 for an example.
During the time between the write and the latch operation, a read from OCR1A or OCR1B will
read the contents of the temporary location. This means that the most recently written value
always will read out of OCR1A/B
When the OCR1 contains $0000 or TOP, the output OC1A/OC1B is updated to low or high on
t h e n e x t c o m p a r e m a t c h , a c c o r d i n g t o t h e s e t t i n g s o f C O M 1 A 1 / C O M 1 A 0 o r
COM1B1/COM1B0. This is shown in Table 17.
Note: If the compare register contains the TOP value and the prescaler is not in use
(CS12..CS10 = 001), the PWM output will not produce any pulse at all, because up-counting
and down-counting values are reached simultaneously. When the prescaler is in use
COM1X1
OCR1X Latch
OCR1X Latch
0
0
1
1
X = A or B
COM1X0
0
1
0
1
Compare Value Changes
Effect on OCX1
Not connected
Not connected
Cleared on compare match, up-counting. Set on compare match,
down-counting (non-inverted PWM).
Cleared on compare match, down-counting. Set on compare match,
up-counting (inverted PWM).
Compare Value Changes
Glitch
Counter Value
Compare Value
Counter Value
Compare Value
PWM Output OC1X
PWM Output OC1X
2603G–USB–04/06