AT43USB355M-AC ATMEL [ATMEL Corporation], AT43USB355M-AC Datasheet - Page 35
AT43USB355M-AC
Manufacturer Part Number
AT43USB355M-AC
Description
Full-speed USB Microcontroller with Embedded Hub, ADC and PWM
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT43USB355M-AC.pdf
(115 pages)
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2603G–USB–04/06
USB Interrupt Enable Register – UIER
• Bit 7 – SOF IE: Enable Start of Frame Interrupt
When the SOF IE bit is set (1), the Start of Frame Interrupt is enabled.
• Bit 6 – EOF2 IE: Enable EOF2 Interrupt
When the EOF2 IE bit is set (1), the EOF2 Interrupt is enabled.
• Bit 5 – Res: Reserved bit
This bit is reserved and always read as zero.
• Bit 4 – FEP3 IE: Enable Function End-point 3 Interrupt
When the FE3 IE bit is set (1), the Function End-point 3 Interrupt is enabled.
• Bit 3 – HEP0 IE: Enable End-point 0 Interrupt
When the HEP0 IE bit is set (1), the Hub End-point 0 Interrupt is enabled.
• Bit 2 – FEP2 IE: Enable End-point 2 Interrupt
When the FE2 IE bit is set (1), the Function End-point 2 Interrupt is enabled.
• Bit 1 – FEP1 IE: Enable End-point 1 Interrupt
When the FE1 IE bit is set (1), the Function End-point 1 Interrupt is enabled.
• Bit 0 – FEP0 IE: Enable End-point 0 Interrupt
When the FE0 IE bit is set (1), the Function End-point 0 Interrupt is enabled.
Suspend/Resume Register – SPRSR
• Bit 7..4 – Res: Reserved Bits
These bits are reserved and are always read as zeros.
• Bit 3 – BUS INT: USB Bus Interrupt
When the USB reset separation feature is enabled (SPRSIE and SPRSMSK bits 3 are set to
1) the BUS INT bit is set when USB bus reset is detected by the USB hardware.
• Bit 2 – FRWUP: Function Remote Wakeup
The USB hardware sets this bit to signal that External Interrupt 1 is detected indicating remote
wakeup. An interrupt is generated if the FRWUP IE bit of the SPRSIE register is set.
• Bit 1 – RSM: Resume
The USB hardware sets this bit when a USB resume signaling is detected at any of its port
except Port 1. An interrupt is generated if the RSM IE bit of the SPRSIE register is set.
• Bit 0 – GLB SUSP: Global Suspend
The USB hardware sets this bit when a USB global suspend signaling is detected. An interrupt
is generated if the GLBSUSP IE bit of the SPRSIE register is set.
Initial Value
Read/Write
Initial Value
Read/Write
$1FF3
$1FFA
Bit
Bit
SOF IE
R/W
R
7
–
0
7
0
EOF2 IE
R
6
–
0
R/W
6
0
R
5
–
0
5
R
0
–
R
4
–
0
FEP3 IE
R/W
4
0
BUS INT
R/W
3
0
HEP0 IE
R/W
3
0
FRWUP
R
2
0
FEP2 IE
R/W
2
0
RSM
AT43USB355
R
1
0
FEP1 IE
R/W
1
0
GLB SUSP
FEP0 IE
R
0
0
R/W
0
0
SPRSR
UIER
35
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