AT43USB355M-AC ATMEL [ATMEL Corporation], AT43USB355M-AC Datasheet - Page 45

• Manufacturer Part Number: AT43USB355M-AC
• Description: Full-speed USB Microcontroller with Embedded Hub, ADC and PWM
• Manufacturer: ATMEL [ATMEL Corporation]

2603G–USB–04/06
Timer/Counter1 Control Register B – TCCR1B
• Bit 7 – ICNC1: Input Capture1 Noise Canceler (4 CKs)
When the ICNC1 bit is cleared (zero), the input capture trigger noise canceler function is dis-
abled. The input capture is triggered at the first rising/falling edge sampled on the ICP (input
capture pin) as specified. When the ICNC1 bit is set (one), four successive samples are mea-
sured on the ICP and all samples must be high/low according to the input capture trigger
specification in the ICES1 bit. The actual sampling frequency is the 12 MHz system clock
frequency.
• Bit 6 – ICES1: Input Capture1 Edge Select
While the ICES1 bit is cleared (zero), the Timer/Counter1 contents are transferred to the Input
Capture Register (ICR1) on the falling edge of the ICP. While the ICES1 bit is set (one), the
Timer/Counter1 contents are transferred to the ICR1 on the rising edge of the ICP.
• Bits 5, 4 – Res: Reserved Bits
These bits are reserved bits in the AT43USB355 and always read zero.
• Bit 3 – CTC1: Clear Timer/Counter1 on Compare Match
When the CTC1 control bit is set (one), the Timer/Counter1 is reset to $0000 in the clock cycle
after a compareA match. If the CTC1 control bit is cleared, Timer/Counter1 continues counting
and is unaffected by a compare match. Since the compare match is detected in the CPU clock
cycle following the match, this function will behave differently when a prescaling higher than 1
is used for the timer. When a prescaling of 1 is used, and the compareA register is set to C,
the timer will count as follows if CTC1 is set:
... | C-2 | C-1 | C | 0 | 1 | ...
When the prescaler is set to divide by 8, the timer will count like this:
... | C-2, C-2, C-2, C-2, C-2, C-2, C-2, C-2 | C-1, C-1, C-1, C-1, C-1, C-1, C-1, C-1 | C, 0, 0, 0,
0, 0, 0, 0 | ...
In PWM mode, this bit has no effect.
• Bits 2, 1, 0 – CS12, CS11, CS10: Clock Select1, Bit 2, 1 and 0
The Clock Select1 bits 2, 1 and 0 define the prescaling source of Timer/Counter1.
Table 14. Clock 1 Prescale Select
Read/Write
Initial Value
$2E ($4E)
Bit
CS12
0
0
0
0
1
ICNC1
R/W
7
0
CS11
0
0
1
1
0
ICES1
R/W
6
0
CS10
R/W
5
–
0
0
1
0
1
0
R/W
Description
Stop, the Timer/Counter1 is stopped.
CK
CK/8
CK/64
CK/256
4
–
0
CTC1
R
3
0
CS12
R
2
0
AT43USB355
CS11
R/W
1
0
CS10
R/W
0
0
TCCR1B
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