PI7C21P100NH PERICOM [Pericom Semiconductor Corporation], PI7C21P100NH Datasheet - Page 25

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PI7C21P100NH

Manufacturer Part Number
PI7C21P100NH
Description
2-PORT PCI-X BRIDGE
Manufacturer
PERICOM [Pericom Semiconductor Corporation]
Datasheet

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4.2.1.4
4.2.2
4.2.3
4.3
Table 4-3 READ TRANSACTIN HANDLING
When the originating bus is operating in the PCI-X mode and the destination bus is operating
in the conventional PCI mode, PI7C21P100 uses the PCI conventional memory write
command for both the PCI-X memory write and PCI-X memory write block commands.
PI7C21P100 attempts to transfer write data on the conventional PCI interface when the PCI-X
data crosses a 128-byte boundary or the end of the PCI-X transfer occurs. As long as a 128-
byte buffer is full, or the end of transfer remains from the PCI-X memory write command
when a 128-byte boundary is crossed, the transfer will continue on the conventional PCI
interface.
DELAYED/SPLIT WRITE TRANSACTIONS
Delayed/Split write forwarding is used for I/O write transactions, Type 1 configuration write
transactions, and Type 0 configuration write transactions.
Delayed/Split write forwarding transactions are retried on the originating bus, completed on
the destination bus (if necessary), and then completed on the originating bus. For DWORD
transactions, PI7C21P100 uses delayed transactions in conventional PCI mode and split
requests in PCI-X mode. Only one request queue entry is allowed for either delayed or split
write transactions.
IMMEDIATE WRITE TRANSACTIONS
PI7C21P100 considers Type 0 configuration writes on the primary bus meant for the bridge as
immediate write transactions for the bridge. PI7C21P100 will execute the transaction and
indicate its completion by accepting the DWORD of data immediately.
READ TRANSACTIONS
Read transactions are treated as delayed read for conventional PCI mode, split read for PCI-X
mode, or immediate read. Table 4-3 shows the read behavior.
Memory Read
Memory Read Line
Memory Read Multiple
Memory Read DWORD (PCI-X mode)
Memory Read Block (PCI-X mode)
I/O Read
Type 0 Configuration Read
Type 1 Configuration Read
PCI-X TO PCI
Type of Transaction
Page 25 of 77
Delayed
Delayed
Delayed
Split (PCI-X mode)
Split (PCI-X mode)
Delayed/Split (PCI-X)
Immediate on the primary bus, Delayed/Split (PCI-X
mode) on the secondary bus
Delayed/Split (PCI-X mode)
ADVANCE INFORMATION
Type of Handling
June 10, 2005 Revision 1.06
2-PORT PCI-X BRIDGE
PI7C21P100

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