AD7829 AD [Analog Devices], AD7829 Datasheet - Page 14

• Manufacturer Part Number: AD7829
• Description: 3 V/5 V, 2 MSPS, 8-Bit, 1-, 4-, 8-Channel Sampling ADCs
• Manufacturer: AD [Analog Devices]

AD7822/AD7825/AD7829
MICROPROCESSOR INTERFACING
The parallel port on the AD7822/AD7825/AD7829 allows the
ADCs to be interfaced to a range of many different micro-
controllers. This section explains how to interface the AD7822,
AD7825, and AD7829 with some of the more common micro-
controller parallel interface protocols.
AD7822/AD7825/AD7829 to 8051
Figure 23 below shows a parallel interface between the AD7822,
AD7825, and AD7829 and the 8051 microcontroller. The EOC
signal on the AD7822, AD7825, and AD7829 provides an inter-
rupt request to the 8051 when a conversion ends and data is
ready. Port 0 of the 8051 may serve as an input or output port,
or, as in this case when used together, may be used as a bidirec-
tional low order address and data bus. The address latch enable
output of the 8051 is used to latch the low byte of the address
during accesses to the device, while the high order address byte
is supplied from Port 2. Port 2 latches remain stable when the
AD7822, AD7825, and AD7829 are addressed, as they do not have
to be turned around (set to 1) for data input as is the case for Port 0.
AD7822/AD7825/AD7829 to PIC16C6x/7x
Figure 24 shows a parallel interface between the AD7822,
AD7825, and AD7829 and the PIC16C64/65/74. The EOC
signal on the AD7822, AD7825, and AD7829 provides an
interrupt request to the microcontroller when a conversion
begins. Of the PIC16C6x/7x range of microcontrollers only
the PIC16C64/65/74 can provide the option of a parallel slave
port. Port D of the microcontroller will operate as an 8-bit wide
*ADDITIONAL PINS OMITTED FOR CLARITY
8051*
AD0–AD7
A8–A15
ALE
INT
RD
Figure 23. Interfacing to the 8051
LATCH
DECODER
DB0–DB7
CS
RD
EOC
AD7822/
AD7825/
AD7829*
–14–
parallel slave port when control bit PSPMODE in the TRISE
register is set. Setting PSPMODE enables the port pin RE0 to
be the RD output and RE2 to be the CS (chip select) output.
For this functionality, the corresponding data direction bits
of the TRISE register must be configured as outputs (reset to
0). See PIC16/17 Microcontroller User Manual.
AD7822/AD7825/AD7829 to ADSP-21xx
Figure 25 below shows a parallel interface between the AD7822,
AD7825, and AD7829 and the ADSP-21xx series of DSPs. As
before, the EOC signal on the AD7822, AD7825, and AD7829
provides an interrupt request to the DSP when a conversion ends.
*ADDITIONAL PINS OMITTED FOR CLARITY
*ADDITIONAL PINS OMITTED FOR CLARITY
PIC16C6x/7x*
ADSP-21xx*
PSP0–PSP7
Figure 24. Interfacing to the PIC16C6x/7x
A13–A0
Figure 25. Interfacing to the ADSP-21xx
D7–D0
DMS
INT
IRQ
CS
RD
RD
EN
ADDRESS
DECODE
LOGIC
DB0–DB7
CS
DB0–DB7
CS
RD
EOC
RD
EOC
AD7822/
AD7825/
AD7829*
AD7822/
AD7825/
AD7829*
REV. B