AD7829 AD [Analog Devices], AD7829 Datasheet - Page 10

• Manufacturer Part Number: AD7829
• Description: 3 V/5 V, 2 MSPS, 8-Bit, 1-, 4-, 8-Channel Sampling ADCs
• Manufacturer: AD [Analog Devices]

AD7822/AD7825/AD7829
There is a minimum time delay between the falling edge of RD
and the next falling edge of the CONVST signal, t
minimum acquisition time required of the track-and-hold in
order to maintain 8-bit performance. Figure 13 shows the typical
performance of the AD7825 when channel hopping for various
acquisition times. These results were obtained using an external
reference and internal V
V
Figure 13. Effective Number of Bits vs. Acquisition Time
for the AD7825
The on-chip track-and-hold can accommodate input frequen-
cies to 10 MHz, making the AD7822, AD7825, and AD7829
ideal for subsampling applications. When the AD7825 is con-
verting a 10 MHz input signal at a sampling rate of 2 MSPS,
the effective number of bits typically remains above seven,
corresponding to a signal-to-noise ratio of 42 dBs as shown
in Figure 14.
DB0–DB7
CONVST
TRACK CHx
IN1
A0–A2
EOC
and V
CS
RD
8.0
7.5
7.0
6.5
6.0
5.5
5.0
8.5
500
IN4
Figure 12. Channel Hopping Timing
t
2
HOLD CHx
with 0 V on Channel 4 and 0.5 V on Channel 1.
120ns
200
t
1
100
MID
ACQUISITION TIME – ns
TRACK CHx
50
while channel hopping between
40
ADDRESS CHANNEL y
30
TRACK CHy
VALID
DATA
20
t
13
15
13
t
3
. This is the
10
HOLD CHy
–10–
POWER-UP TIMES
The AD7822/AD7825/AD7829 have a 1 µs power-up time when
using an external reference and a 25 µs power-up time when using
the on-chip reference. When V
AD7825, and AD7829 are in a low current mode of operation.
Ensure that the CONVST line is not floating when V
as if there is a glitch on CONVST while V
attempt to power up before V
an unknown state. In order to carry out a conversion, the AD7822,
AD7825, and AD7829 must first be powered up. The AD7829 is
powered up by a rising edge on the CONVST pin and a conversion
is initiated on the falling edge of CONVST. Figure 15 shows how
to power up the AD7829 when V
AD7829 has been powered down using the CONVST pin when
using either the on-chip, or an external, reference. When using
an external reference, the falling edge of CONVST may occur
before the required power-up time has elapsed; however, the
conversion will not be initiated on the falling edge of CONVST but
rather at the moment when the part has completely powered up,
i.e., after 1 µs. If the falling edge of CONVST occurs after the required
power-up time has elapsed, then it is upon this falling edge that a
conversion is initiated. When using the on-chip reference, it is nec-
essary to wait the required power-up time of approximately 25 µs
before initiating a conversion; i.e., a falling edge on CONVST
may not occur before the required power-up time has elapsed,
when V
down using the CONVST pin as shown in Figure 15.
CONVST
CONVST
Figure 14. SNR vs. Input Frequency on the AD7825
V
V
DD
DD
DD
50
48
46
44
42
40
38
is first connected or after the AD7829 has been powered
0.2
Figure 15. AD7829 Power-Up Time
t
t
1
POWER-UP
POWER-UP
25 s
1 s
EXTERNAL REFERENCE
INITIATED HERE
ON-CHIP REFERENCE
INITIATED HERE
CONVERSION
3
CONVERSION
INPUT FREQUENCY – MHz
DD
DD
4
has fully settled and could enter
DD
is first connected, the AD7822,
is first connected or after the
5
DD
f
SAMPLE
6
is rising, the part will
= 2MHz
8
DD
is applied,
10
REV. B