AD5412ACPZ AD [Analog Devices], AD5412ACPZ Datasheet - Page 31

• Manufacturer Part Number: AD5412ACPZ
• Description: Single Channel, 12/16-Bit, Serial Input, Current Source & Voltage Output DAC
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
supply for other devices in the system or as a termination for
pull-up resistors. This facility offers the advantage of not having
to bring a digital supply across an isolation barrier. The internal
power supply is enabled by leaving the DV
unconnected. To disable the internal supply DV
should be tied to 0V. DV
current, for a load regulation graph see Figure 49.
EXTERNAL BOOST FUNCTION
The addition of an external boost transistor as shown in Figure
61 will reduce the power dissipated in the AD5412/AD5422 by
reducing the current flowing in the on-chip output transistor
(dividing it by the current gain of the external circuit). A
discrete NPN transistor with a breakdown voltage, BV
greater than 60V can be used.The external boost capability has
been developed for those users who may wish to use the
AD5412/AD5422 at the extremes of the supply voltage, load
current and temperature range. The boost transistor can also be
used to reduce the amount of temperature induced drift in the
part. This will minimise the temperature induced drift of the
on-chip voltage reference, which improves on drift and
linearity.
EXTERNAL COMPENSATION CAPACITOR
The voltage output can ordinarily drive capacitive loads of up to
20nF, if there is a requirement to drive greater capacitive loads,
of up to 1uF, an external compensation capacitor can be
connected between the C
capacitor will keep the output voltage stable but will also reduce
the bandwidth and increase the settling time of the voltage
output.
DIGITAL SLEW RATE CONTROL
The Slew Rate Control feature of the AD5412/AD5422 allows
the user to control the rate at which the output value changes.
This feature is available on both the current and voltage
outputs. With the slew rate control feature disabled the output
value will change at a rate limited by the output drive circuitry
and the attached load. If the user wishes to reduce the slew rate
this can be achieved by enabling the slew rate control
feature.With the feature enabled via the SREN bit of the
CONTROL register, (See Table 14) the output, instead of
slewing directly between two values, will step digitally at a rate
defined by two parameters accessible via the CONTROL
register as shown in Table 14. The parameters are SR CLOCK
and SR STEP. SR CLOCK defines the rate at which the digital
slew will be updated. SR STEP defines by how much the output
value will change at each update. Together both parameters
Figure 61. External Boost Configuration
AD5412/
AD5422
CC
COMP
is capable of supplying up to 5mA of
BOOST
I
OUT
0.022 F
and V
OUT
1k
pins. The additon of the
PBSS8110Z
MJD31C
OR
CC
R
LOAD
SELECT pin
CC
SELECT
CEO
,
Rev. PrF | Page 31 of 38
define the rate of change of the output value.Table 22 and Table
23 outline the range of values for both the SR CLOCK and SR
STEP parameters.
Table 22. Slew Rate Step Size options
Table 23. Slew Rate Update Clock Options
The time it will take for the output to slew over a given output
range can be expressed as follows;
Where:
Slew Time is expressed in seconds
Output Change is expressed in Amps for I
When the slew rate control feature is enabled, all output
changes will change at the programmed slew rate, for example if
the CLEAR pin is asserted the output will slew to the clear value
at the programmed slew rate. The output can be halted at its
current value with a write to the CONTROL register. To avoid
halting the output slew, the SLEW ACTIVE bit can be read to
check that the slew has completed before writing to the
AD5412/AD5422 registers. See Table 19.The update clock
frequency for any given value will be the same for all output
ranges, the step size however will vary across output ranges for a
given value of step size as the LSB size will be different for each
output range.Table 24 shows the range of programmable slew
times for a full-scale change on any of the output ranges. The
values were obtained using the Slew Time equation above.
SlewTime
SR STEP
SR CLOCK
000
001
010
011
100
101
110
111
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
=
StepSize
×
UpdateCloc
AD5412 Step
Size (LSBs)
OutputChan
1/16
⅛
¼
½
1
2
4
8
Update Clock Frequency (Hz)
AD5412/AD5422
kFrequency
OUT
257732
198413
152439
131579
115741
69444
37594
25773
20161
16026
10288
8278
6897
5525
4237
3300
or Volts for V
ge
AD5422 Step
Size (LSBs)
128
×
16
32
64
1
2
4
8
LSBSize
OUT