m471b5273bh1 Samsung Semiconductor, Inc., m471b5273bh1 Datasheet - Page 6

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m471b5273bh1

Manufacturer Part Number
m471b5273bh1
Description
Ddr3 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
5.0 Pin Description
*The V
Unbuffered SoDIMM
ODT0, ODT1
CKE0, CKE1
A0-A9, A11,
Pin Name
CK0, CK1
CK0, CK1
BA0-BA2
SA0-SA1
A13-A15
A10/AP
A12/BC
S0, S1
DD
RAS
CAS
SDA
SCL
WE
and V
DDQ
Clock Inputs, positive line
Clock Inputs, negative line
Clock Enables
Row Address Strobe
Column Address Strobe
Write Enable
Chip Selects
Address Inputs
Address Input/Autoprecharge
Address Input/Burst chop
SDRAM Bank Addresses
On-die termination control
Serial Presence Detect (SPD) Clock Input
SPD Data Input/Output
SPD Address
pins are tied common to a single power-plane on these desigus.
Description
6 of 28
Number
14
2
2
2
1
1
1
2
1
1
3
2
1
1
2
DQS0-DQS7
DQS0-DQS7
Pin Name
DQ0-DQ63
DM0-DM7
V
V
V
RESET
TEST
REFDQ
DDSPD
REFCA
V
V
V
NC
DD
SS
TT
Data Input/Output
Data Masks/ Data strobes,
Termination data strobes
Data strobes
Data strobes complement
Reset Pin
Logic Analyzer specific test pin (No connect
on SODIMM)
Core and I/O Power
Ground
Input/Output Reference
SPD and Temp sensor Power
Termination Voltage
Reserved for future use
Total
Rev. 1.0 December 2008
Description
DDR3 SDRAM
Number
204
64
18
52
8
8
8
1
1
2
1
2
3

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