m471b5273bh1 Samsung Semiconductor, Inc., m471b5273bh1 Datasheet - Page 21

• Manufacturer Part Number: m471b5273bh1
• Description: Ddr3 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

DDR3-1333 Speed Bins
DDR3-1066 Speed Bins
14.3 Speed Bins and CL, tRCD, tRP, tRC and tRAS for corresponding Bin
Intermal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACT to PRE command period
CL = 6
CL = 7
CL = 8
CL = 9
CL = 10
Supported CL Settings
Supported CWL Settings
Unbuffered SoDIMM
Intermal read command to first data
ACT to internal read or write delay time
PRE command period
ACT to ACT or REF command period
ACT to PRE command period
CL = 6
CL = 7
CL = 8
Supported CL Settings
Supported CWL Settings
DDR3 SDRAM Speed Bins include tCK, tRCD, tRP, tRAS and tRC for each corresponding bin.
Parameter
Parameter
CL-nRCD-nRP
CL-nRCD-nRP
Speed
Speed
CWL = 5,6
CWL = 5,6
CWL = 5
CWL = 6
CWL = 7
CWL = 5
CWL = 6
CWL = 7
CWL = 5
CWL = 6
CWL = 7
CWL = 7
CWL = 7
CWL = 5
CWL = 6
CWL = 5
CWL = 6
CWL = 5
CWL = 6
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
tCK(AVG)
Symbol
Symbol
tRCD
tRAS
tRCD
tRAS
tRP
tRC
tAA
tRP
tRC
tAA
21 of 28
13.5 (13.125)
13.5 (13.125)
13.5 (13.125)
49.5 (49.125)
13.125
13.125
13.125
50.625
1.875
1.875
1.875
1.875
37.5
min
min
2.5
2.5
1.5
1.5
36
(Optional) Note 5,9
5,9
5,9
5,9
5,9
DDR3-1066
DDR3-1333
Reserved
Reserved
Reserved
(Optional)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
7 - 7 - 7
9 -9 - 9
6,7,8,9
6,7,8
5,6,7
5,6
9*tREFI
9*tREFI
<1.875
<1.875
max
<2.5
<2.5
3.3
20
max
<2.5
<2.5
3.3
-
-
-
20
-
-
-
Rev. 1.0 December 2008
DDR3 SDRAM
Units
nCK
nCK
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
nCK
nCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1,2,3,6
1,2,3,4
1,2,3,4
1,2,3,4,7
1,2,3,4,7
1,2,3,4,
1,2,3,4,
Note
1,2,3
1,2,3,7
1,2,3,7
1,2,3,4
Note
1,2,3
8
4
4
8
4
4
4
4
4
5