mt18hvs25672rhy-667 Micron Semiconductor Products, mt18hvs25672rhy-667 Datasheet - Page 10

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mt18hvs25672rhy-667

Manufacturer Part Number
mt18hvs25672rhy-667
Description
2gb X72, Dr 200-pin Ddr2 Sdram Vlp Sordimm
Manufacturer
Micron Semiconductor Products
Datasheet
Table 10:
Table 11:
PDF: 09005aef82882ad5/Source: 09005aef82882b0e
HVS18C_256x72RH.fm - Rev. B 5/08 EN
Parameter
DC high-level input voltage
DC low-level input voltage
Input voltage (limits)
Input differential-pair cross
voltage
Input differential voltage
Input differential voltage
Input current
Output disabled current
Static supply current
Dynamic supply
Input capacitance
Stabilization time
Input clock slew rate
SSC modulation frequency
SSC clock input frequency deviation
PLL loop bandwidth (–3dB from unity gain)
Parameter
PLL Specifications
CUA845 device or JESD82-21 equivalent
PLL Clock Driver Timing Requirements and Switching Characteristics
Notes:
1. PLL timing and switching specifications are critical for proper operation of the DDR2 DIMM.
Symbol
V
V
This is a subset of parameters for the specific PLL used.
I
ID
ID
I
DDLD
V
V
V
I
C
V
ODL
DD
I
(
(
IN
IH
IN
IX
IL
I
DC
AC
)
)
OE, OS, FBIN, FBIN#
OE, OS, CK, CK#
OE, OS, CK, CK#
Each input
CK, CK#
Pins
n/a
2GB (x72, DR) 200-Pin DDR2 SDRAM VLP SORDIMM
10
(not connected to a PCB)
CK and CK# = 410 MH
OE = L, V
all output are open
Differential input
Differential input
Differential input
V
V
V
I
I
I
Condition
= V
= V
= V
LVCMOS
LVCMOS
C
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol
L
ODL
DD
DD
DD
= 0pf
slr(i)
t
L
or V
or V
or V
= 100mV
Register and PLL Specifications
SS
SS
SS
Z
Min
0.0
30
0.65 × V
1
2
(V
–250
Min
–0.3
DD
0.15
–10
100
0.3
0.6
2
/2) -
©2007 Micron Technology, Inc. All rights reserved.
DD
Max
0.35 × V
–0.5
V
V
V
(V
33
6
4
DD
DD
DD
Max
DD
+250
+500
+300
0.15
+10
3
+ 0.3
+ 0.4
+ 0.4
/2) +
DD
Units
MHz
V/ns
kHz
Units
µs
%
mA
µA
µA
µA
µA
pF
V
V
V
V
V
V

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