zl50235 Zarlink Semiconductor, zl50235 Datasheet - Page 29

• Manufacturer Part Number: zl50235
• Description: 16 Channel Voice Echo Canceller
• Manufacturer: Zarlink Semiconductor

This register is used to scale the comfort noise up or down. Larger values will increase the relative level of
comfort noise. The default value of 16
74
Reserve
Reserve
SupDec
Bit 7
NS7
hex
NLInc
Slow
Bit 7
Bit 7
0
0
0
Power-up
is recommended if the original NLP is used.
Power-up
Power-up
16
45
54
hex
hex
hex
Must be set to zero.
These three bits (SD2,SD1,SD0) control how long the echo canceller remains in a fast
convergence state following a path change, Reset or Bypass operation. A value of zero will keep
the echo canceller in fast convergence indefinitely.
Must be set to zero.
Slow convergence mode speed adjustment.(Bits Slow2, Slow1,Slow0)
For Slow = 1, 2, ..., 7, slow convergence speed is reduced by a factor of 2
normal adaptation.
For Slow = 0, no adaptation occurs during slow convergence.
Bit 6
NS6
Reserved bits. Must be set to 4
Noise level estimator ramping rate. When InjCtrl = 1, a lower value will give faster ramping.
When InjCtrl = 0, a higher value will give faster ramping. The default value of 5
G.168 compliance with InjCtrl = 1. A value of C
Reserve
Bit 6
SD2
Bit 6
Bit 5
NS5
Reserve
Bit 5
SD1
Bit 5
ECA: Noise Scaling (NS)
ECB: Noise Scaling (NS)
Functional Description of Register Bits
Functional Description of Register Bits
Functional Description of Register Bits
Bit 4
NS4
hex
will provide G.168 compliance with the Advanced NLP. A value of
ECA: Control Register 4
ECB: Control Register 4
Reserve
ECA: Noise Control
ECB: Noise Control
Zarlink Semiconductor Inc.
hex
Bit 4
Bit 4
SD0
for normal operation.
ZL50235
Bit 3
NS3
29
NLInc3
Bit 3
Bit 3
Bit 2
NS2
0
hex
is recommended if InjCtrl = 0.
NLInc2
Slow2
Bit 2
Bit 2
Bit 1
NS1
0A
2A
hex
hex
R/W Address:
R/W Address:
+ Base Address
+ Base Address
0B
2B
09
29
NLInc1
Slow1
Slow
Bit 1
Bit 1
hex
hex
hex
hex
R/W Address:
R/W Address:
R/W Address:
R/W Address:
as compared to
+ Base Address
+ Base Address
+ Base Address
+ Base Address
hex
Data Sheet
will provide
Bit 0
NS0
NLInc0
Slow0
Bit 0
Bit 0