zl50235 Zarlink Semiconductor, zl50235 Datasheet

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zl50235

Manufacturer Part Number

zl50235

Description

16 Channel Voice Echo Canceller

Manufacturer

Zarlink Semiconductor

Datasheet

1.ZL50235.pdf (43 pages)

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Bonase Electronics (HK) Co., Limited

Part Number:

zl50235QCG1

Manufacturer:

ST

Quantity:

1 000

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Download datasheet (660Kb)

Features

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Independent multiple channels of echo

cancellation; from 16 channels of 64 ms to 8

channels of 128 ms with the ability to mix

channels at 128 ms or 64 ms in any combination

Independent Power Down mode for each group of

2 channels for power management

Fully compliant to ITU-T G.165, G.168 (2000) and

(2002) specifications

Passed AT&T voice quality testing for carrier

grade echo cancellers

Compatible to ST-BUS and GCI interfaces with

2 Mbps serial PCM data

PCM coding, µ/A-Law ITU-T G.711 or sign

magnitude

Per channel Fax/Modem G.164 2100 Hz or G.165

2100 Hz phase reversal Tone Disable

Per channel echo canceller parameters control

Transparent data transfer and mute

Fast reconvergence on echo path changes

Fully programmable convergence speeds

Patented Advanced Non-Linear Processor with

high quality subjective performance

Protection against narrow band signal divergence

and instability in high echo environments

MCLK

Fsel

Rin

Sin

C4i

F0i

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

Parallel

Timing

Serial

PLL

Unit

to

Copyright 2003-2006, Zarlink Semiconductor Inc. All Rights Reserved.

V

DD1 (3.3 V)

DS CS R/W A10-A0 DTA

ECA/ECB

ECA/ECB

Microprocessor Interface

Group 0

Group 4

Figure 1 - ZL50235 Device Overview

Zarlink Semiconductor Inc.

Echo Canceller Pool

ECA/ECB

ECA/ECB

Group 1

Group 5

V

SS

1

D7-D0

ECA/ECB

ECA/ECB

Group 2

Group 6

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Applications

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ZL50235/QCC

ZL50235/GDC

ZL50235QCG1 100 Pin LQFP* Trays, Bake & Drypack

+9 dB to -12 dB level adjusters (3 dB steps) at all

signal ports

Offset nulling of all PCM channels

10 MHz or 20 MHz master clock operation

3.3 V IO pads and 1.8 V Logic core operation with

5 V tolerant inputs

IEEE-1149.1 (JTAG) Test Access Port

ZL50232, ZL50233, ZL50234 and ZL50235 have

same pinouts in both LQFP and LBGA packages

Voice over IP network gateways

Voice over ATM, Frame Relay

T1/E1/J1 multichannel echo cancellation

Wireless base stations

Echo Canceller pools

DCME, satellite and multiplexer system

IRQ

16 Channel Voice Echo Canceller

V

DD2 (1.8 V)

TMS

ECA/ECB

ECA/ECB

Group 3

Group 7

TDI TDO TCK TRST

Test Port

Ordering Information

100 Pin LQFP

208 Ball PBGA Trays

*Pb Free Matte Tin

Note:

Refer to Figure 4

for Echo Canceller

block diagram

-40°C to +85°C

Parallel

Serial

ODE

to

Trays

Data Sheet

Rout

Sout

RESET

ZL50235

March 2006

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