zl30462 Zarlink Semiconductor, zl30462 Datasheet - Page 11

• Manufacturer Part Number: zl30462
• Description: Vibratto-s Dvd Processor Product Brief
• Manufacturer: Zarlink Semiconductor

the DPLL to move into and out of the Auto Holdover state. The ZL30462 State Machine may also be driven by
controlling the mode select pins MS2, MS1. To avoid network synchronization problems, the State Machine has
built-in basic protection that does not allow switching the DPLL into a state where it cannot operate correctly e.g., it
is not possible to force the DPLL into Normal mode when all references are lost.
2.0
This section details how to control and monitor the hardware pins of the ZL30462 and general power supply
decoupling information. More detailed application information can be found in the ZL30462 Applications Note.
2.1
The ZL30462 is designed to transition from one mode to the other driven by the internal State Machine or by
manual control. The following examples present a couple of typical scenarios of how the ZL30462 can be employed
in network synchronization equipment (e.g., timing modules, line cards or stand alone synchronizers).
2.1.1
The Free-run to Holdover to Normal transition represents a sequence of steps that will most likely occur during a
new system installation or scheduled maintenance of timing cards. The process starts from the RESET state and
then transitions to Free-run when the device is being initialized. At the end of this process the ZL30462 should be
switched into Normal mode (with MS2, MS1 set to 00) instead of Holdover mode. If the reference clock is available,
the ZL30462 will transition briefly into Holdover state to acquire synchronization and switch automatically to Normal
state. If the reference clock is not available the ZL30462 will stay in Holdover state indefinitely. Whilst in Holdover
state, the DPLL will continue generating clocks with the same accuracy as in the Free-run mode, waiting for a valid
reference clock. When the system is connected to the network (or timing card switched to a valid reference) this will
enable the DPLL to start the synchronization process. After acquiring lock, the ZL30462 will automatically switch
from Holdover state to Normal state without system intervention. This transition to the Normal state will be flagged
by the LOCK status pin.
ZL30462 Mode Switching - Examples
Applications
System Start-up Sequence: FREE-RUN --> HOLDOVER --> NORMAL
______
RESET == 1
Reset
unconditional return from
MS2, MS1 == 10 forces
any state to FreeRun
Figure 6 - Transition from Free-run to Normal mode
MS2, MS1 != 10
FreeRun
10
MS2, MS1 == 01 or
RSEL change
Zarlink Semiconductor Inc.
Holdover
ZL30462
01
MS2, MS1 == 00
Ref: OK &
10
{Auto}
RSEL change
(Locked)
Normal
00
MS2, MS1 == 00
Ref: OK --> Fail
{Auto}
&
Holdover
Auto
Ref: Fail --> OK &
MS2, MS1 == 00
& AHRD=1 &
MHR 0 --> 1
{Manual}
Ref: Fail --> OK &
MS2, MS1 == 00
& AHRD=0 &
{Auto}
Data Sheet