ht82a821r Holtek Semiconductor Inc., ht82a821r Datasheet - Page 8

• Manufacturer Part Number: ht82a821r
• Description: Ht82a821r -- Usb Audio Mcu
• Manufacturer: Holtek Semiconductor Inc.

Indirect Addressing Register
Locations 00H and 02H are indirect addressing regis-
ters that are not physically implemented. Any read/write
operation on [00H] ([02H]) will access the data memory
pointed to by MP0 (MP1). Reading location 00H (02H)
indirectly will return the result 00H. Writing indirectly re-
sults in no operation.
The function of data movement between two indirect ad-
dressing registers is not supported. The memory pointer
registers (MP0 and MP1) are 8-bit registers used to ac-
cess the RAM by combining corresponding indirect ad-
dressing registers.
Bank Pointer
The bank pointer is used to assign the accessed RAM
bank. When the users want to access the RAM bank 0, a
40H in any bank are overlapped.
Accumulator
The accumulator is closely related to ALU operations. It
is also mapped to location 05H of the data memory and
can carry out immediate data operations. The data
movement between two data memory locations must
pass through the accumulator.
Arithmetic and Logic Unit - ALU
This circuit performs 8-bit arithmetic and logic opera-
tions. The ALU provides the following functions:
The ALU not only saves the results of a data operation
but also changes the status register.
Rev. 1.10
0 should be loaded onto BP. RAM locations before
Arithmetic operations (ADD, ADC, SUB, SBC, DAA)
Logic operations (AND, OR, XOR, CPL)
Rotation (RL, RR, RLC, RRC)
Increment and Decrement (INC, DEC)
Branch decision (SZ, SNZ, SIZ, SDZ ....)
Bit No.
6~7
0
1
2
3
4
5
Label
PDF
OV
AC
TO
C
Z
C is set if an operation results in a carry during an addition operation or if a borrow does not
take place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate
through carry instruction.
AC is set if an operation results in a carry out of the low nibbles in addition or no borrow from
the high nibble into the low nibble in subtraction; otherwise AC is cleared.
Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.
OV is set if an operation results in a carry into the highest-order bit but not a carry out of the
highest-order bit, or vice versa; otherwise OV is cleared.
PDF is cleared by a system power-up or executing the CLR WDT instruction. PDF is set by
executing the HALT instruction.
TO is cleared by a system power-up or executing the CLR WDT or HALT instruction. TO is
set by a WDT time-out.
Unused bit, read as 0
Status (0AH) Register
8
Status Register - STATUS
This 8-bit register (0AH) contains the zero flag (Z), carry
flag (C), auxiliary carry flag (AC), overflow flag (OV),
power down flag (PDF), and watchdog time-out flag
(TO). It also records the status information and controls
the operation sequence.
With the exception of the TO and PDF flags, bits in the
status register can be altered by instructions like most
other registers. Any data written into the status register
will not change the TO or PDF flag. In addition, opera-
tions related to the status register may give different re-
sults from those intended.
The TO flag can be affected only by a system power-up,
a WDT time-out or executing the CLR WDT or HALT
instruction. The PDF flag can be affected only by exe-
cuting the HALT or CLR WDT instruction or during a
system power-up.
The Z, OV, AC and C flags generally reflect the status of
the latest operations.
In addition, upon entering the interrupt sequence or exe-
cuting a subroutine call, the status register will not be
automatically pushed onto the stack. If the contents of
the status are important and if the subroutine can cor-
rupt the status register, precautions must be taken to
save it properly.
Interrupt
The device provides USB interrupt and internal
timer/event counter interrupts. The Interrupt Control
Register0 (INTC0;0BH) contains the interrupt control
bits that are used to set the enable/disable status and in-
terrupt request flags.
Once an interrupt subroutine is serviced, all the other in-
terrupts will be blocked (by clearing the EMI bit). This
scheme may prevent any further interrupt nesting. Other
interrupt requests may occur during this interval but only
Function
HT82A821R
June 29, 2007