ht82a821r Holtek Semiconductor Inc., ht82a821r Datasheet - Page 20

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ht82a821r

Manufacturer Part Number
ht82a821r
Description
Ht82a821r -- Usb Audio Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet

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DAC_Limit_L and DAC_Limit_H are used to define the 16-bit DAC output limit. DAC_Limit_L and DAC_Limit_H are un-
signed value. If the 16-bit data from Host over the range defined by DAC_Limit_L and DAC_Limit_H, the output digital
code to DAC will be clamp.
Setting DAC output limit value example:
;-----------------------------------------------------------
; DAC Limit POR Value=8000H
; Set DAC Limit Value=FF00H
;-----------------------------------------------------------
clr
set
;-----------------------------------------------------------
In order to prevent the pop noise of speaker output, power amplifier should be output at the value of VDD/2 (send
8000H to DAC) during the initial power on state. If software set high then clear the bit DAC_WR_TRIG (bit 3 of
DAC_WR register), the value on the DAC_Limit_L and DAC_Limit_H registers will write to DAC.
Example to avoid popping noise:
System_Initial:
;-----------------------------------------------------------
; Avoid Pop Noise
;-----------------------------------------------------------
mov
mov
mov
andm
mov
orm
clr
mov
mov
nop
;Write 8000H to DAC
set
nop
clr
nop
;-----------------------------------------------------------
mov
mov
;-----------------------------------------------------------
Note: At DAC write data mode (high nibble of WDTS register is 0101b), DAC_Limit_L and DAC_Limit_H registers will
Rev. 1.10
0~2, 4~7
Bit No.
3
be the 16-bit DAC input data register at falling edge of DAC_WR_TRIG. Otherwise, these two registers are
used to define the 16-bit DAC output limit.
DAC_WR_TRIG
[02DH]
[02EH]
a,WDTS
FIFO_TEMP,a
a,01010000b
a,WDTS
a,01010000b
a,WDTS
[02DH]
a,80H
[02EH],a
[02FH].3
[02FH].3
a,FIFO_TEMP
WDTS,a
Label
DAC_Limit_H
DAC_Limit_L
R/W
R/W
R
; Set DAC Limit low byte=00H
; Set DAC Limit high byte=FFH
;Save WDTS value
;Enter DAC Write Data mode, high nibble of WDTS=0101b
;Set DAC data low byte=00H
;Set DAC data high byte=80H
;Restore WDTS value
;Quit DAC Write Data mode
Power-on
DAC_WR (2FH) Register
0
0
20
Undefined bit, read as 0 .
DAC write trigger bit
DAC output limit high byte
DAC output limit low byte
Functions
HT82A821R
June 29, 2007

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