mc9328mx1 Freescale Semiconductor, Inc, mc9328mx1 Datasheet - Page 95

• Manufacturer Part Number: mc9328mx1
• Description: Arm9 Microprocessor
• Manufacturer: Freescale Semiconductor, Inc

The limitation on pixel clock rise time / fall time are not specified. It should be calculated from the hold
time and setup time, according to:
In most of case, duty cycle is 50 / 50, therefore:
For example: Given pixel clock period = 10ns, duty cycle = 50 / 50, hold time = 1ns, setup time = 1ns.
Falling-edge latch data
Freescale Semiconductor
max rise time allowed = (positive duty cycle - hold time)
max fall time allowed = (negative duty cycle - setup time)
max rise time = (period / 2 - hold time)
max fall time = (period / 2 - setup time)
positive duty cycle = 10 / 2 = 5ns
=> max rise time allowed = 5 - 1 = 4ns
negative duty cycle = 10 / 2 = 5ns
=> max fall time allowed = 5 - 1 = 4ns
max fall time allowed = (negative duty cycle - hold time)
max rise time allowed = (positive duty cycle - setup time)
Ref No.
3
4
5
6
Table 43. Non-Gated Clock Mode Parameters (Continued)
csi_d hold time
csi_pixclk high time
csi_pixclk low time
csi_pixclk frequency
Parameter
MC9328MX1 Technical Data, Rev. 7
10.42
10.42
Min
1
0
Functional Description and Application Information
Max
48
–
–
–
MHz
Unit
ns
ns
ns
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