mc9328mx1 Freescale Semiconductor, Inc, mc9328mx1 Datasheet - Page 25

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mc9328mx1

Manufacturer Part Number
mc9328mx1
Description
Arm9 Microprocessor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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4
This section provides the electrical information including and timing diagrams for the individual modules
of the i.MX1.
4.1
All registers in the ETM9 are programmed through a JTAG interface. The interface is an extension of the
ARM920T processor’s TAP controller, and is assigned scan chain 6. The scan chain consists of a 40-bit
shift register comprised of the following:
The data to be written is scanned into the 32-bit data field, the address of the register into the 7-bit address
field, and a 1 into the read/write bit.
A register is read by scanning its address into the address field and a 0 into the read/write bit. The 32-bit
data field is ignored. A read or a write takes place when the TAP controller enters the UPDATE-DR state.
The timing diagram for the ETM9 is shown in
in
Freescale Semiconductor
Figure
1
Functional Description and Application Information
32-bit data field
7-bit address field
A read/write bit
EXTAL16M input jitter (peak to peak)
EXTAL16M startup time
The 16 MHz oscillator is not recommended for use in new designs.
2.
Embedded Trace Macrocell
Output Trace Port
(Half-Rate Clocking Mode)
TRACECLK
TRACECLK
Table 8. 32k/16M Oscillator Signal Timing (Continued)
Parameter
1
Figure 2. Trace Port Timing Diagram
MC9328MX1 Technical Data, Rev. 7
1
3a
Figure
3b
2a
2. See
Minimum
4a
TBD
2b
Table 9
Valid Data
Functional Description and Application Information
for the ETM9 timing parameters used
RMS
TBD
1
Valid Data
Maximum
TBD
4b
Unit
25

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