mc9328mx1 Freescale Semiconductor, Inc, mc9328mx1 Datasheet - Page 64

• Manufacturer Part Number: mc9328mx1
• Description: Arm9 Microprocessor
• Manufacturer: Freescale Semiconductor, Inc

Functional Description and Application Information
4.8
To use the internal transmit (TX) and receive (RX) data FIFOs when the SPI 1 module is configured as a
master, two control signals are used for data transfer rate control: the SS signal (output) and the SPI_RDY
signal (input). The SPI1 Sample Period Control Register (PERIODREG1) and the SPI2 Sample Period
Control Register (PERIODREG2) can also be programmed to a fixed data transfer rate for either SPI 1 or
SPI 2. When the SPI 1 module is configured as a slave, the user can configure the SPI1 Control Register
(CONTROLREG1) to match the external SPI master’s timing. In this configuration, SS becomes an input
signal, and is used to latch data into or load data out to the internal data shift registers, as well as to
increment the data FIFO.
different triggering mechanisms.
64
1
Ref No.
The SPI_CLK clock frequency and duty cycle, setup and hold times of receive data can be set by programming
SPI_Control (0x00216138) register together with system clock.
1
2
3
4
5
6
7
8
9
SPI Timing Diagrams
SPI_DATA_OUT (BT12)
SPI_EN setup time relative to rising edge of SPI_CLK
Transmit data delay time relative to rising edge of SPI_CLK
Transmit data hold time relative to rising edge of SPI_EN
SPI_CLK rise time
SPI_CLK fall time
SPI_EN hold time relative to falling edge of SPI_CLK
Receive data setup time relative to falling edge of SPI_CLK
Receive data hold time relative to falling edge of SPI_CLK
SPI_CLK frequency, 50% duty cycle required
SPI_DATA_IN (BT4)
SPI CLK (BT13)
SPI_EN (BT11)
Table 23. SPI Interface Timing Parameter Table Using MC13180
Figure 38. SPI Interface Timing Diagram Using MC13180
Figure 39
1
through
7
MC9328MX1 Technical Data, Rev. 7
Parameter
8
Figure 43
1
4
9
show the timing relationship of the master SPI using
5
1
2
1
Minimum
6
15
15
15
15
0
0
0
0
–
3
Freescale Semiconductor
Maximum
15
15
25
25
20
–
–
–
–
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns