r5f3650kcnfb Renesas Electronics Corporation., r5f3650kcnfb Datasheet - Page 18

• Manufacturer Part Number: r5f3650kcnfb
• Description: M16c/65c Group Renesas Mcu
• Manufacturer: Renesas Electronics Corporation.

M16C/65C Group
R01DS0015EJ0100 Rev.1.00
Feb 07, 2011
1.6
Table 1.12
Power supply: VCC2 is used to supply power to the external bus associated pins. The dual power supply configuration
Power supply
input
Analog power
supply input
Reset input
CNVSS
External data bus
width select input
Bus control
pins
Signal Name
Pin Functions
allows VCC2 to interface at a different voltage than VCC1.
Pin Functions for the 128-Pin Package (1/3)
CS0 to CS3
WRH / BHE
Pin Name
D8 to D15
A0 to A19
WRL / WR
D0 to D7
A0/D0 to
A1/D0 to
CNVSS
RESET
AVCC,
VCC1,
VCC2,
A7/D7
A8/D7
HOLD
AVSS
BYTE
HLDA
RDY
VSS
ALE
RD
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
I
I
Power Supply
VCC1
VCC1
VCC1
VCC1
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
-
Apply 2.7 to 5.5 V to pins VCC1 and VCC2 (VCC1 ≥ VCC2),
and 0 V to the VSS pin.
This is the power supply for the A/D and D/A converters.
Connect the AVCC pin to VCC1, and connect the AVSS pin
to VSS.
Driving this pin low resets the MCU.
Input pin to switch processor modes. After a reset, to start
operating in single-chip mode, connect the CNVSS pin to
VSS via a resistor. To start operating in microprocessor
mode, connect the pin to VCC1.
Input pin to select the data bus of the external area. The data
bus is 16 bits when it is low and 8 bits when it is high. This
pin must be fixed either high or low. Connect the BYTE pin to
VSS in single-chip mode.
Inputs or outputs data (D0 to D7) while accessing an
external area with a separate bus.
Inputs or outputs data (D8 to D15) while accessing an
external area with a 16-bit separate bus.
Outputs address bits A0 to A19.
Inputs or outputs data (D0 to D7) and outputs address bits
(A0 to A7) by timesharing, while accessing an external area
with an 8-bit multiplexed bus.
Inputs or outputs data (D0 to D7) and outputs address bits
(A1 to A8) by timesharing, while accessing an external area
with a 16-bit multiplexed bus.
Outputs chip-select signals CS0 to CS3 to specify an
external area.
Outputs WRL , WRH , ( WR , BHE ), and RD signals. WRL and
WRH can be switched with BHE and WR .
Outputs an ALE signal to latch the address.
HOLD input is unavailable. Connect the HOLD pin to VCC2
via a resistor (pull-up).
In a hold state, HLDA outputs a low-level signal.
The MCU bus is placed in wait state while the RDY pin is
driven low.
•
•
WRL , WRH , and RD selected
If the external data bus is 16 bits, data is written to an even
address in an external area when WRL is driven low. Data
is written to an odd address when WRH is driven low. Data
is read when RD is driven low.
WR , BHE , and RD selected
Data is written to an external area when WR is driven low.
Data in an external area is read when RD is driven low. An
odd address is accessed when BHE is driven low. Select
WR , BHE , and RD when using an 8-bit external data bus.
Description
Page 18 of 109
1. Overview