r5f3650kcnfb Renesas Electronics Corporation., r5f3650kcnfb Datasheet - Page 104

• Manufacturer Part Number: r5f3650kcnfb
• Description: M16c/65c Group Renesas Mcu
• Manufacturer: Renesas Electronics Corporation.

M16C/65C Group
R01DS0015EJ0100 Rev.1.00
Feb 07, 2011
Switching Characteristics
(V
Table 5.62
Notes:
CC1
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
d(BCLK-AD)
h(BCLK-AD
h(RD-AD
h(WR-AD)
d(BCLK-CS)
h(BCLK-CS)
d(BCLK-ALE)
h(BCLK-ALE
d(BCLK-RD)
h(BCLK-RD)
d(BCLK-WR)
h(BCLK-WR)
d(BCLK-DB)
d(DB-WR)
h(WR-DB)
5.3.4.4
1.
2.
3.
4.
Symbol
= V
Calculated according to the BCLK frequency as follows:
(
----------------------------------- - 40 ns
Calculated according to the BCLK frequency as follows:
off, and does not show hold time of data bus.
Hold time of data bus varies with capacitor volume and pull-
up (pull-down) resistance value.
Hold time of data bus is expressed in
t = −CR × ln(1 − V
by a circuit of the right figure.
For example, when V
hold time of output low level is
t = −30 pF × 1 kΩ × In(1 − 0.2V
Calculated according to the BCLK frequency as follows:
Hold time is equal to or less than 0 ns when the BCLK frequency exceeds 20 MHz.
0.5 10
--------------------- - 15 ns
n 0.5
CC2
)
f
This standard value shows the timing when the output is
= 6.7 ns.
(
BCLK
–
)
f
×
)
(
BCLK
= 3 V, V
) 10
)
9
Address output delay time
Address output hold time (in relation to BCLK)
Address output hold time (in relation to RD)
Address output hold time (in relation to WR)
Chip select output delay time
Chip select output hold time (in relation to BCLK)
ALE signal output delay time
ALE signal output hold time
RD signal output delay time
RD signal output hold time
WR signal output delay time
WR signal output hold time
Data output delay time (in relation to BCLK)
Data output delay time (in relation to WR)
Data output hold time (in relation to WR)
In Wait State Setting 2φ + 3φ, 2φ + 4φ, 3φ + 4φ, and 4φ + 5φ, and When
Accessing External Area
Memory Expansion and Microprocessor Modes (in Wait State Setting 2φ + 3φ, 2φ + 4φ,
3φ + 4φ, and 4φ + 5φ, and When Accessing External Area)
×
–
)
9
[
SS
–
]
= 0 V, at T
OL
[
/V
]
OL
CC2
= 0.2V
)
opr
n is 3 for 2φ + 3φ, 4 for 2φ + 4φ, 4 for 3φ + 4φ, and 5 for 4φ + 5φ.
CC2
Parameter
= -20°C to 85°C/-40°C to 85°C unless otherwise specified)
CC2
/V
, C = 30 pF, R = 1 kΩ,
CC2
)
(3)
0.5 10
--------------------- - 25 ns
f
(
BCLK
×
)
9
–
Figure 5.29
Measuring
Condition
[
See
]
(Note 2)
(Note 1)
(Note 4)
DBi
Min.
5. Electrical Characteristics
-4
0
0
0
0
0
Standard
V
CC1
Max.
= V
30
30
25
30
30
40
Page 104 of 109
C
R
CC2
Unit
= 3 V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns